3.3 VOLT TIME SLOT INTERCHANGE IDT72V70210 DIGITAL SWITCH 1,024 x 1,024 Flatpack (TQFP) packages FEATURES: Operating Temperature Range -40C to +85C 32 serial input and output streams 3.3V I/O with 5V tolerant inputs and TTL compatible outputs 1,024 x 1,024 channel non-blocking switching at 2.048 Mb/s Per-channel Variable Delay Mode for low-latency applications DESCRIPTION: Per-channel Constant Delay Mode for frame integrity applications Automatic identification of ST-BUS and GCI serial streams The IDT72V70210 has a non-blocking switch capacity of 1,024 x 1,024 Automatic frame offset delay measurement channels at 2.048 Mb/s. With 32 inputs and 32 outputs, programmable per Per-stream frame delay offset programming stream control, and a variety of operating modes the IDT72V70210 is designed Per-channel high impedance output control for the TDM time slot interchange function in either voice or data applications. Per-channel processor mode to allow microprocessor writes to Some of the main features of the IDT72V70210 are low power 3.3 Volt TX streams operation, automatic ST-BUS /GCI sensing, memory block programming, Direct microprocessor access to all internal memories simple microprocessor interface, one cycle direct internal memory accesses, Memory block programming for quick set-up JTAG Test Access Port (TAP) and per stream programmable input offset delay, IEEE-1149.1 (JTAG) Test Port variable or constant throughput modes, internal loopback, output enable, and Internal Loopback for testing Processor Mode. Available in 144-pin Ball Grid Array (BGA) and 144-pin Thin Quad FUNCTIONAL BLOCK DIAGRAM Vcc GND TMS TDI TCK TRST ODE RESET TDO Test Port RX0 TX0 RX1 TX1 Loopback RX2 TX2 RX3 TX3 RX4 TX4 RX5 TX5 RX6 TX6 RX7 TX7 Output RX8 TX8 MUX RX9 TX9 RX10 TX10 Data Memory RX11 TX11 RX12 TX12 RX13 TX13 Receive Transmit RX14 TX14 Serial Data Serial Data RX15 TX15 Streams Streams RX16 TX16 RX17 TX17 RX18 TX18 RX19 TX19 RX20 TX20 RX21 TX21 Connection RX22 TX22 RX23 Memory TX23 Internal RX24 TX24 Registers RX25 TX25 RX26 TX26 RX27 TX27 RX28 TX28 RX29 TX29 RX30 TX30 RX31 TX31 Timing Unit Microprocessor Interface 5714 drw01 CLK F0i FE IC DS CS R/W A0-A11 DTA D0-D15 IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. The ST-BUS is a trademari of Mitel Corp. JANUARY 2005 1 2005 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-5714/4IDT72V70210 3.3V TIME SLOT INTERCHANGE DIGITAL SWITCH 1,024 x 1,024 COMMERCIAL TEMPERATURE RANGE PIN CONFIGURATIONS A1 BALL PAD CORNER A RX0 RX1 RX3 RX6 TX4 TX7 RX10 RX12 RX15 TX10 TX11 TX1 B CLK ODE RX2 RX5 TX0 TX3 TX6 RX9 RX1 RX14 TX9 TX1 3 2 C F0i FE RESET RX4 RX7 TX2 TX5 RX8 RX11 TX8 TX13 TX14 D TMS IC TDI GND VCC VCC VCC VCC VCC TX15 RX16 RX17 E VCC GND GND GND GND VCC RX19 RX20 TD0 TCK TRST RX21 F DS CS R/W VCC GND GND GND GND VCC RX22 RX23 RX18 G A0 A1 A2 VCC GN GND GND GND VCC TX16 TX17 TX18 D H A3 A4 A5 TX19 TX20 TX21 VCC GN GND GND GND VCC D J A6 A7 A8 D15 TX22 RX24 TX23 VCC VCC VCC VCC GND K A9 A10 DTA D9 D6 D3 D0 TX29 TX26 RX27 RX25 RX26 L A11 IC D12 D7 D4 D1 TX30 TX27 TX24 RX28 RX29 D11 M D13 D10 IC D14 D8 D5 D2 TX31 TX28 TX25 RX31 RX30 12 3 4 5 6 7 8 9 10 11 12 5714 drw 02 NOTE: 1. All I/O pins are 5V tolerant except for TMS, TDI and TRST. BGA: 1mm pitch, 13mm x 13mm (BC144-1, order code: BC) TOP VIEW 2