74ALVC162245PAG Renesas

IDT74ALVC162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74ALVC162245 BUS TRANSCEIVER WITH 3-STATE OUTPUTS DESCRIPTION: FEATURES: 0.5 MICRON CMOS Technology This 16-bit bus transceiver is built using advanced dual metal CMOS Typical tSK(o) (Output Skew) < 250ps technology. The ALVC162245 is designed for asynchronous communica- ESD > 2000V per MIL-STD-883, Method 3015 > 200V using tion between data buses. The control-function implementation minimizes machine model (C = 200pF, R = 0) external timing requirements. VCC = 3.3V 0.3V, Normal Range This device can be used as two 8-bit transceivers or one 16-bit VCC = 2.7V to 3.6V, Extended Range transceiver. It allows data transmission from the A bus to the B bus or from VCC = 2.5V 0.2V the B bus to the A bus, depending on the logic level at the direction-control CMOS power levels (0.4 W typ. static) (DIR) input. The output-enable (OE) input can be used to disable the device Rail-to-Rail output swing for increased noise margin so that the buses are effectively isolated. Available in TSSOP package The ALVC162245 has series resistors in the device output structure of the A port which will significantly reduce line noise when used with light loads. This driver has been designed to drive 12mA at the designated DRIVE FEATURES: threshold levels. The B port has a 24mA driver. Balanced Output Drivers: 12mA (A port) High Output Drivers: 24mA (B port) APPLICATIONS: 3.3V high speed systems 3.3V and lower voltage computing systems FUNCTIONAL BLOCK DIAGRAM 1 24 1DIR 2DIR 48 25 2OE 1OE 47 36 1A1 2A1 2 13 1B1 2B1 46 35 1A2 2A2 3 14 1B2 2B2 44 33 1A3 2A3 5 16 1B3 2B3 43 32 1A4 2A4 6 17 1B4 2B4 41 30 1A5 2A5 8 19 1B5 2B5 40 29 1A6 2A6 9 20 1B6 2B6 38 27 1A7 2A7 11 22 1B7 2B7 37 26 1A8 2A8 12 23 1B8 2B8 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JUNE 2009 1 2009 Integrated Device Technology, Inc. DSC-4605/6IDT74ALVC162245 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +4.6 V (3) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 1OE 1DIR 1 48 TSTG Storage Temperature 65 to +150 C 2 1B1 47 1A1 IOUT DC Output Current 50 to +50 mA 1B2 3 46 1A2 IIK Continuous Clamp Current, 50 mA VI < 0 or VI > VCC 4 GND 45 GND IOK Continuous Clamp Current, VO < 0 50 mA 1B3 5 44 1A3 ICC Continuous Current through each 100 mA ISS VCC or GND 6 1B4 1A4 43 NOTES: 7 VCC 42 VCC 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation 1B5 8 41 1A5 of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating 1B6 9 40 1A6 conditions for extended periods may affect reliability. 2. VCC terminals. GND 10 39 GND 3. All terminals except VCC. 1B7 11 38 1A7 CAPACITANCE (TA = +25C, F = 1.0MHz) 1B8 12 37 1A8 (1) Symbol Parameter Conditions Typ. Max. Unit 2B1 13 36 2A1 CIN Input Capacitance VIN = 0V 5 7 pF 2B2 14 35 2A2 COUT Output Capacitance VOUT = 0V 7 9 pF GND 15 GND 34 COUT I/O Port Capacitance VIN = 0V 7 9 pF 2B3 NOTE: 16 2A3 33 1. As applicable to the device type. 2B4 17 32 2A4 VCC 18 31 VCC PIN DESCRIPTION 2B5 19 30 2A5 Pin Names Description 2B6 20 xOE Output Enable Inputs (Active LOW) 29 2A6 DIR Direction Control Inputs GND 21 GND 28 xA x Side A Inputs or 3-State Outputs 2B7 22 2A7 27 xBx Side B Inputs or 3-State Outputs 2B8 23 26 2A8 24 2DIR 25 2OE TSSOP TOP VIEW (1) FUNCTION TABLE (EACH 8-BIT SECTION) Inputs xOE xDIR Outputs L L B data to A bus L H A data to B bus H X Isolation NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Dont Care 2