IDT74FCT163244A/C 3.3V CMOS 16-BIT BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74FCT163244A/C BUFFER/LINE DRIVER FEATURES: DESCRIPTION: 0.5 MICRON CMOS Technology The FCT163244 16-bit buffer/line drivers are built using advanced dual Typical tSK(o) (Output Skew) < 250ps metal CMOS technology. These high-speed, low-power devices offer bus/ ESD > 2000V per MIL-STD-883, Method 3015 > 200V using backplane interface capability with improved packing density. These machine model (C = 200pF, R = 0) devices have a flow-through organization for simplifying board layout. The VCC = 3.3V 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended three-state controls operate these devices in a Quad-Nibble, Dual-Byte or Range single 16-bit word mode. All inputs are designed with hysteresis for CMOS power levels (0.4 W typ. static) improved noise margin. Rail-to-rail output swing for increased noise margin The inputs of the FCT163244 can be driven from either 3.3V or 5V Low Ground Bounce (0.3V typ.) devices. This feature allows the use of these devices as translators in a Inputs (except I/O) can be driven by 3.3V or 5V components mixed 3.3V/5V supply system. Thus, the FCT163244 can be used as Available in SSOP, TSSOP, and TVSOP packages buffers to connect 5V components to a 3.3V bus. FUNCTIONAL BLOCK DIAGRAM 1 25 1OE 3OE 13 2 47 36 1Y1 1A1 3Y1 3A1 14 3 35 46 3A2 3Y2 1A2 1Y2 16 5 33 44 3A3 3Y3 1A3 1Y3 17 6 32 43 1A4 3Y4 3A4 1Y4 24 48 2OE 4OE 19 8 41 30 2Y1 2A1 4Y1 4A1 20 9 29 40 2A2 4Y2 2Y2 4A2 22 11 27 38 4Y3 2A3 2Y3 4A3 23 12 26 37 2Y4 2A4 4A4 4Y4 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2009 1 2009 Integrated Device Technology, Inc. DSC-2532/12IDT74FCT163244A/C 3.3V CMOS 16-BIT BUFFER/LINE DRIVER INDUSTRIAL TEMPERATURE RANGE (1)(1)(1)(1)(1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +4.6 V (3) VTERM Terminal Voltage with Respect to GND 0.5 to 7 V 1 48 1OE 2OE (4) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 2 47 1Y1 1A1 TSTG Storage Temperature 65 to +150 C IOUT DC Output Current 60 to +60 mA 3 46 1Y2 1A2 NOTES: GND 4 45 GND 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation 5 44 1Y3 1A3 of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating 6 43 1Y4 1A4 conditions for extended periods may affect reliability. 2. Vcc terminals. VCC 7 42 VCC 3. Input terminals. 4. Outputs and I/O terminals. 8 41 2Y1 2A1 9 40 2Y2 2A2 10 39 GND GND CAPACITANCE (TA = +25C, F = 1.0MHz) 11 38 2A3 2Y3 (1) Symbol Parameter Conditions Typ. Max. Unit 12 37 2Y4 2A4 CIN Input Capacitance VIN = 0V 3.5 6 pF COUT Output Capacitance VOUT = 0V 3.5 8 pF 13 36 3A1 3Y1 NOTE: 14 35 3A2 1. This parameter is measured at characterization but not tested. 3Y2 GND 15 34 GND 16 33 3A3 3Y3 17 32 3Y4 3A4 PIN DESCRIPTION 18 31 VCC VCC Pin Names Description 19 30 xOE 3-State Output Enable Inputs (Active LOW) 4A1 4Y1 xA x Data Inputs 20 29 4Y2 4A2 x Y x 3-State Outputs 21 28 GND GND 22 27 4A3 4Y3 (1) FUNCTION TABLE 23 26 4Y4 4A4 Inputs Outputs 24 25 4OE 3OE xOE xAx xYx LL L LH H SSOP/ TSSOP/ TVSOP HX Z TOP VIEW NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level Z = High-Impedance 2