74FCT163245APFG Renesas

IDT74FCT163245A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74FCT163245A/C BIDIRECTIONAL TRANSCEIVER FEATURES: DESCRIPTION: 0.5 MICRON CMOS Technology The FCT163245 16-bit transceivers are built using advanced dual Typical tSK(o) (Output Skew) < 250ps metal CMOS technology. These high-speed, low-power transceivers are ESD > 2000V per MIL-STD-883, Method 3015 > 200V using ideal for asynchronous communication between two buses (A and B). The machine model (C = 200pF, R = 0) Direction and Output Enable controls are designed to operate these devices VCC = 3.3V 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended as either two independent 8-bit transceivers or one 16-bit transceiver. The Range direction control pin (xDIR) controls the direction of data flow. The output CMOS power levels (0.4 W typ. static) enable pin (xOE) overrides the direction control and disables both ports. Rail-to-rail output swing for increased noise margin All inputs are designed with hysteresis for improved noise margin. Low Ground Bounce (0.3V typ.) Inputs (except I/O) can be driven by 3.3V or 5V components Available in SSOP, TSSOP, and TVSOP packages FUNCTIONAL BLOCK DIAGRAM 24 1 1 DIR 2 DIR 48 25 1OE 2OE 36 47 1A1 2A1 2 13 1B1 2B1 35 46 1A2 2A2 3 14 1B2 2B2 33 44 1A3 2A3 16 5 1B3 2B3 43 32 1A4 2A4 6 17 1B4 2B4 30 41 1A5 2A5 8 19 1B5 2B5 40 29 1A6 2A6 9 20 1B6 2B6 38 27 1A7 2A7 11 22 1B7 2B7 37 26 1A8 2A8 12 23 1B8 2B8 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE SEPTEMBER 2009 1 2009 Integrated Device Technology, Inc. DSC-2554/13IDT74FCT163245A/C 3.3V CMOS 16-BIT BIDIRECTIONAL TRANSCEIVER INDUSTRIAL TEMPERATURE RANGE (1)(1)(1)(1)(1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +4.6 V 1 48 1DIR (3) 1OE VTERM Terminal Voltage with Respect to GND 0.5 to 7 V (4) 2 47 VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 1B1 1A1 TSTG Storage Temperature 65 to +150 C 3 46 1B2 1A2 IOUT DC Output Current 60 to +60 mA GND 4 45 GND NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 5 44 1B3 1A3 permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational 6 43 1B4 1A4 sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. VCC 7 42 VCC 2. Vcc terminals. 3. Input terminals. 8 41 1B5 1A5 4. Outputs and I/O terminals. 9 40 1B6 1A6 GND 10 39 GND 11 38 CAPACITANCE (TA = +25C, F = 1.0MHz) 1B7 1A7 (1) Symbol Parameter Conditions Typ. Max. Unit 12 37 1B8 1A8 CIN Input Capacitance VIN = 0V 3.5 6 pF 13 36 2B1 2A1 COUT Output Capacitance VOUT = 0V 3.5 8 pF 14 35 2B2 2A2 NOTE: 1. This parameter is measured at characterization but not tested. GND 15 34 GND 16 33 2B3 2A3 17 32 2B4 2A4 PIN DESCRIPTION VCC 18 31 VCC Pin Names Description xOE Output Enable Input (Active LOW) 19 30 2B5 2A5 xDIR Direction Control Input 20 29 2B6 2A6 x A x Side A Inputs or 3-State Outputs GND 21 28 GND x B x Side B Inputs or 3-State Outputs 22 27 2B7 2A7 23 26 2B8 2A8 24 25 2DIR 2OE (1) FUNCTION TABLE Inputs xOE1 xDIR Outputs L L Bus B Data to Bus A SSOP/ TSSOP/ TVSOP L H Bus A Data to Bus B TOP VIEW H X High Z State NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don t Care Z = High-impedance 2