74FCT16373ATPVG8 Renesas

IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE FAST CMOS 16-BIT IDT74FCT16373AT/CT TRANSPARENT LATCH FEATURES: DESCRIPTION: 0.5 MICRON CMOS Technology The FCT16373T 16-bit transparent D-type latch is built using advanced dual High-speed, low-power CMOS replacement for ABT functions metal CMOS technology. These high-speed, low-power latches are ideal for Typical tSK(o) (Output Skew) < 250ps temporary storage of data. They can be used for implementing memory address Low input and output leakage 1A (max.) latches, I/O ports, and bus drivers. The Output Enable and Latch Enable controls VCC = 5V 10% are organized to operate each device as two 8-bit latches, or one 16-bit latch. High drive outputs (32mA IOH, 64mA IOL) Flow-through organization of signal pins simplifies layout. All inputs are designed Power off disable outputs permit live insertion with hysteresis for improved noise margin. Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, The FCT16373T is ideally suited for driving high-capacitance loads and low- TA = 25C impedance backplanes. The output buffers are designed with power off disable Available in SSOP and TSSOP packages capability to allowlive insertio of boards when used as backplane drivers. FUNCTIONAL BLOCK DIAGRAM 2OE 1OE 2LE 1LE D D 1D1 2D1 1O1 2O1 C C TO SEVEN OTHER CHANNELS TO SEVEN OTHER CHANNELS IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JULY 2017 1 DSC-5454/7IDT74FCT16373AT/CT FAST CMOS 16-BIT TRANSPARENT LATCH INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to 7 V 1 48 1LE 1OE (3) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 2 47 1O1 1D1 TSTG Storage Temperature 65 to +150 C 3 46 1O2 1D2 IOUT DC Output Current 60 to +120 mA GND 4 45 GND NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 5 44 1O3 1D3 permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational 6 43 1O4 1D4 sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. VCC 7 42 VCC 2. All device terminals except FCT162XXX Output and I/O terminals. 3. Outputs and I/O terminals for FCT162XXX. 8 41 1O5 1D5 9 40 1O6 1D6 GND 10 39 GND CAPACITANCE (TA = +25C, f = 1.0MHz) 11 38 (1) 1O7 1D7 Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6 pF 12 37 1O8 1D8 COUT Output Capacitance VOUT = 0V 3.5 8 pF 13 36 2O1 2D1 NOTE: 14 35 1. This parameter is measured at characterization but not tested. 2O2 2D2 GND 15 34 GND 16 33 2O3 2D3 17 32 2O4 2D4 PIN DESCRIPTION VCC 18 31 VCC Pin Names Description x D x Data Inputs 19 30 2O5 2D5 xLE Latch Enable Input (Active HIGH) 20 29 2O6 2D6 xOE Output Enable Input (Active LOW) GND 21 28 GND x O x 3-State Outputs 22 27 2O7 2D7 23 26 2O8 2D8 24 25 2LE 2OE (1) FUNCTION TABLE Inputs Outputs TOP VIEW xDx xLE xOE xOx HH L H Package Type Package Code Order Code LH L L TSSOP PAG56 PAG XX H Z SSOP PVG56 PVG NOTE: 1. H = HIGH voltage level L = LOW voltage level X = Dont care Z = High-impedance 2