74FCT163827CPAG Renesas

74FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 20-BIT BUFFER 74FCT163827A/C FEATURES: DESCRIPTION: 0.5 MICRON CMOS Technology The FCT163827 20-bit buffer is built using advanced dual metal CMOS Typical tSK(o) (Output Skew) < 250ps technology. These 20-bit bus drivers provide high-performance bus ESD > 2000V per MIL-STD-883, Method 3015 > 200V using interface buffering for wide data/address paths or busses carrying parity. machine model (C = 200pF, R = 0) Two pairs of NAND-ed output enable controls offer maximum control VCC = 3.3V 0.3V, Normal Range, or VCC = 2.7V to 3.6V, Extended flexibility and are organized to operate the device as two 10-bit buffers or Range one 20-bit buffer. Flow-through organization of signal pins simplifies layout. CMOS power levels (0.4 W typ. static) All inputs are designed with hysteresis for improved noise margin. Rail-to-rail output swing for increased noise margin The FCT163827 has series current limiting resistors. This offers low Low Ground Bounce (0.3V typ.) ground bounce, minimal undershoot, and controlled output fall times, Inputs (except I/O) can be driven by 3.3V or 5V components reducing the need for external series terminating resistors. Available in TSSOP package The inputs of the FCT163827 can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V supply system. FUNCTIONAL BLOCK DIAGRAM 1 28 1OE1 2OE1 29 56 1OE2 2OE2 55 2 42 15 1A1 1Y1 2A1 2Y1 TO NINE OTHER CHANNELS TO NINE OTHER CHANNELS INDUSTRIAL TEMPERATURE RANGE MAY 2019 1 DSC-3083/1274FCT163827A/C 3.3V CMOS 20-BIT BUFFER INDUSTRIAL TEMPERATURE RANGE (1)(1)(1)(1)(1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit 1 56 (2) 1OE2 VTERM Terminal Voltage with Respect to GND 0.5 to +4.6 V 1OE1 (3) VTERM Terminal Voltage with Respect to GND 0.5 to 7 V 2 55 1Y1 1A1 (4) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V 3 54 1Y2 1A2 TSTG Storage Temperature 65 to +150 C GND 4 53 GND IOUT DC Output Current 60 to +60 mA 5 52 NOTES: 1Y3 1A3 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 6 51 1Y4 1A4 permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational VCC 7 50 VCC sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 8 49 1Y5 1A5 2. Vcc terminals. 3. Input terminals. 9 48 1Y6 1A6 4. Outputs and I/O terminals. 10 47 1Y7 1A7 GND 11 46 GND 12 45 1Y8 1A8 CAPACITANCE (TA = +25C, F = 1.0MHz) 13 44 (1) 1Y9 1A9 Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 3.5 6 pF 14 43 1Y10 1A10 COUT Output Capacitance VOUT = 0V 3.5 8 pF 15 42 2A1 2Y1 NOTE: 16 41 2Y2 1. This parameter is measured at characterization but not tested. 2A2 17 40 2Y3 2A3 18 39 GND GND 19 38 PIN DESCRIPTION 2Y4 2A4 Pin Names Description 20 37 2A5 2Y5 xOE x Output Enable Inputs (Active LOW) 21 36 2A6 2Y6 x A x Data Inputs 22 35 VCC VCC x Y x 3-State Outputs 23 34 2Y7 2A7 24 33 2Y8 2A8 25 32 GND GND 26 31 2Y9 2A9 (1) FUNCTION TABLE 27 30 2Y10 2A10 Inputs Outputs 28 29 2OE1 2OE2 xOE1 xOE2 xAx xYx LL L L TOP VIEW LL H H HX X Z Package Type Package Code Order Code XH X Z TSSOP PAG56 PAG NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don t Care Z = High-impedance 2