74FCT240ATQG8 Renesas

IDT54/74FCT240AT/CT FAST CMOS OCTAL BUFFER/LINE DRIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL IDT54/74FCT240AT/CT BUFFER/LINE DRIVER FEATURES: DESCRIPTION: A and C grades The IDT octal buffer/line driver is built using an advanced dual metal Low input and output leakage 1A (max.) CMOS technology. The FCT240T is designed to be employed as a memory CMOS power levels and address driver, clock driver, and bus-oriented transmitter/ receiver True TTL input and output compatibility: which provides improved board density. VOH = 3.3V (typ.) VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 64mA IOL) Meets or exceeds JEDEC standard 18 specifications Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Power off disable outputs permitlive insertio Available in the following packages: Industrial: SOIC, SSOP, QSOP Military: CERDIP, LCC FUNCTIONAL BLOCK DIAGRAM OEA OEB OA0 DA0 DB0 OB0 OA1 DA1 DB1 OB1 OA2 DA2 DB2 OB2 OA3 DA3 DB3 OB3 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND INDUSTRIAL TEMPERATURE RANGES SEPTEMBER 2009 1 2009 Integrated Device Technology, Inc. DSC-5584/8IDT54/74FCT240AT/CT FAST CMOS OCTAL BUFFER/LINE DRIVER MILITARY AND INDUSTRIAL TEMPERATURE RANGES PIN CONFIGURATION INDEX 20 1 OEA VCC 19 DA0 2 OEB 18 3 OA0 OB0 3 2 20 19 17 OA0 4 DB0 18 DA1 DA1 4 1 17 DB0 16 OB1 5 OA1 OB1 5 16 OA1 15 DA2 6 DB1 DA2 6 15 14 DB1 OB2 7 OA2 OB2 7 14 13 OA2 DA3 8 DB2 DA3 8 9 10 11 12 1 12 9 OB3 OA3 3 11 GND 10 DB3 LCC CERDIP/ SOIC/ SSOP/ QSOP TOP VIEW TOP VIEW (1) ABSOLUTE MAXIMUM RATINGS PIN DESCRIPTION Symbol Description Max Unit Pin Names Description (2) VTERM Terminal Voltage with Respect to GND 0.5 to +7 V OEA, OEB 3-State Output Enable Inputs (Active LOW) (3) VTERM Terminal Voltage with Respect to GND 0.5 to VCC+0.5 V Dxx Inputs TSTG Storage Temperature 65 to +150 C Ox x Outputs IOUT DC Output Current 60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational (1) sections of this specification is not implied. Exposure to absolute maximum rating FUNCTION TABLE conditions for extended periods may affect reliability. No terminal voltage may exceed Inputs Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. OEA OEB D Outputs 3. Output and I/O terminals only. LL L H LL H L HH X Z CAPACITANCE (TA = +25C, F = 1.0MHz) NOTE: 1. H = HIGH Voltage Level (1) Symbol Parameter Conditions Typ. Max. Unit X = Dont Care CIN Input Capacitance VIN = 0V 6 10 pF L = LOW Voltage Level Z = High Impedance COUT Output Capacitance VOUT = 0V 8 12 pF NOTE: 1. This parameter is measured at characterization but not tested. 2 OB0 OB3 DA0 GND OEA DB3 VCC OA3 OEB DB2