74LVC162245APVG8 Renesas

IDT74LVC162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74LVC162245A BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: Typical tSK(o) (Output Skew) < 250ps This 16-bit transceiver is built using advanced dual metal CMOS ESD > 2000V per MIL-STD-883, Method 3015 > 200V using technology. The LVC162245A is designed for asynchronous communica- machine model (C = 200pF, R = 0) tion between data buses. The control-function implementation minimizes VCC = 3.3V 0.3V, Normal Range external timing requirements. This device can be used as two 8-bit VCC = 2.7V to 3.6V, Extended Range transceivers or one 16-bit transceiver. It allows data transmission from the CMOS power levels (0.4 W typ. static) A bus to the B bus or from the B bus to the A bus, depending on the logic All inputs, outputs, and I/O are 5V tolerant level at the direction-control (DIR) input. The output-enable (OE) input can Available in SSOP and TSSOP packages be used to disable the device so that the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor the minimum value of the DRIVE FEATURES: resistor is determined by the current-sinking capability of the driver. Balanced Output Drivers: 12mA (A port) All pins can be driven from either 3.3V or 5V devices. This feature allows High Output Drivers: 24mA (B port) the use of this device as a translator in a mixed 3.3V/5V supply system. The LVC162245A has series resistors in the device output structure of APPLICATIONS: the A port which will significantly reduce line noise when used with light 5V and 3.3V mixed voltage systems loads. The driver has been designed to drive 12mA at the designated Data communication and telecommunication systems threshold levels. The B port has a 24mA driver. FUNCTIONAL BLOCK DIAGRAM 24 1 1DIR 2DIR 25 48 1OE 2OE 36 47 1A1 2A1 2 13 1B1 2B1 35 46 1A2 2A2 3 14 1B2 2B2 33 44 1A3 2A3 16 5 1B3 2B3 32 43 1A4 2A4 6 17 1B4 2B4 41 30 1A5 2A5 8 19 1B5 2B5 40 29 1A6 2A6 9 20 1B6 2B6 38 27 1A7 2A7 11 22 1B7 2B7 37 26 1A8 2A8 23 12 1B8 2B8 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE AUGUST 2015 1 2015 Integrated Device Technology, Inc. DSC-4483/5IDT74LVC162245A 3.3V CMOS 16-BIT TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit (2) VTERM Terminal Voltage with Respect to GND 0.5 to +6.5 V (3) VTERM Terminal Voltage with Respect to GND 0.5 to +6.5 V 1DIR 1 48 1OE TSTG Storage Temperature 65 to +150 C 1B1 2 47 1A1 IOUT DC Output Current 50 to +50 mA IIK Continuous Clamp Current, 50 mA 1B2 3 46 1A2 IOK VI < 0 or VO < 0 GND 4 45 GND ICC Continuous Current through each 100 mA ISS VCC or GND 1B3 5 44 1A3 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 1B4 6 43 1A4 permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational VCC 7 42 VCC sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 8 41 1B5 1A5 2. VCC terminals. 3. All terminals except VCC. 1B6 9 40 1A6 GND 10 39 GND 1B7 11 38 1A7 CAPACITANCE (TA = +25C, F = 1.0MHz) (1) 1B8 12 37 1A8 Symbol Parameter Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 4.5 6 pF 2B1 13 36 2A1 COUT Output Capacitance VOUT = 0V 6.5 8 pF 2B2 14 35 2A2 CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF NOTE: GND 15 34 GND 1. As applicable to the device type. 2B3 16 33 2A3 2B4 17 32 2A4 PIN DESCRIPTION VCC 18 31 VCC Pin Names Description xOE Output Enable Input (Active LOW) 2B5 19 30 2A5 xDIR Direction Control Output 20 2B6 29 2A6 xA x Side A Inputs or 3-State Outputs xBx Side B Inputs or 3-State Outputs GND 21 28 GND 22 27 2B7 2A7 (1) 23 2B8 26 2A8 FUNCTION TABLE (EACH 8-BIT SECTION) 24 25 Inputs 2DIR 2OE xOE xDIR Outputs SSOP / TSSOP L L B Data to A Bus TOP VIEW L H A Data to B Bus H X Isolation NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level 2