IDT74LVCH162244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74LVCH162244A BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, AND BUS-HOLD FEATURES: DESCRIPTION: Typical tSK(o) (Output Skew) < 250ps The LVCH162244A 16-bit buffer/driver is built using advanced dual ESD > 2000V per MIL-STD-883, Method 3015 > 200V using metal CMOS technology. The LVCH162244A is designed specifically to machine model (C = 200pF, R = 0) improve both the performance and density of 3-state memory address VCC = 3.3V 0.3V, Normal Range drivers, clock drivers, and bus-oriented receivers and transmitters. The VCC = 2.7V to 3.6V, Extended Range device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. CMOS power levels (0.4 W typ. static) This device provides true outputs and symmetrical active-low output-enable All inputs, outputs, and I/O are 5V tolerant (OE) inputs. Available in TSSOP package All pins of this 16-bit buffer/driver can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. DRIVE FEATURES: The LVCH162244A has series resistors in the device output structure Balanced Output Drivers: 12mA which will significantly reduce line noise when used with light loads. This Full internal series termination driver has been developed to drive 12mA at the designated threshold levels. APPLICATIONS: The LVCH162244A has bus-hold which retains the inputs last state 5V and 3.3V mixed voltage systems whenever the input goes to a high impedance. This prevents floating inputs Data communication and telecommunication systems and eliminates the need for pull-up/down resistors. FUNCTIONAL BLOCK DIAGRAM 1 25 1OE 3OE 2 36 13 47 1A1 1Y1 3A1 3Y1 46 3 35 14 1A2 1Y2 3A2 3Y2 33 16 44 5 1A3 3A3 1Y3 3Y3 43 6 32 17 1A4 1Y4 3A4 3Y4 48 24 2OE 4OE 41 8 30 19 2A1 4A1 2Y1 4Y1 40 9 29 20 2A2 2Y2 4A2 4Y2 38 11 27 22 2A3 4A3 2Y3 4Y3 37 12 26 23 2A4 2Y4 4A4 4Y4 IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE AUGUST 2015 1 2015 Integrated Device Technology, Inc. DSC-4727/6IDT74LVCH162244A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit VTERM Terminal Voltage with Respect to GND 0.5 to +6.5 V 1 48 TSTG Storage Temperature 65 to +150 C 1OE 2OE IOUT DC Output Current 50 to +50 mA 1Y1 2 47 1A1 IIK Continuous Clamp Current, 50 mA 3 IOK VI < 0 or VO < 0 1Y2 46 1A2 ICC Continuous Current through each 100 mA GND 4 45 GND ISS VCC or GND 5 1Y3 44 NOTE: 1A3 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause 6 1Y4 permanent damage to the device. This is a stress rating only and functional operation 1A4 43 of the device at these or any other conditions above those indicated in the operational VCC 7 sections of this specification is not implied. Exposure to absolute maximum rating 42 VCC conditions for extended periods may affect reliability. 8 2Y1 41 2A1 2Y2 9 40 2A2 10 GND 39 GND CAPACITANCE (TA = +25C, F = 1.0MHz) 11 2Y3 38 (1) 2A3 Symbol Parameter Conditions Typ. Max. Unit 12 CIN Input Capacitance VIN = 0V 4.5 6 pF 2Y4 37 2A4 COUT Output Capacitance VOUT = 0V 6.5 8 pF 3Y1 13 36 3A1 CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF 3Y2 14 35 NOTE: 3A2 1. As applicable to the device type. 15 GND 34 GND 3A3 16 3Y3 33 3Y4 17 PIN DESCRIPTION 32 3A4 Pin Names Description 18 VCC 31 VCC xOE 3-State Output Enable Inputs (Active LOW) 4Y1 19 30 4A1 (1) xA x Data Inputs 4Y2 20 x Y x 3-State Outputs 29 4A2 NOTE: 21 GND 28 1. These pins haveBus-Hol. All other pins are standard inputs, outputs, or I/Os. GND 4Y3 22 27 4A3 23 4Y4 26 4A4 (1) FUNCTION TABLE (EACH 4-BIT BUFFER) 24 25 4OE 3OE Inputs Outputs xOE xAx xYx TSSOP LL L TOP VIEW LH H HX Z NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level Z = High-Impedance 2