IDT74LVCH162245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 5V TOLERANT I/O INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74LVCH162245A BUS TRANSCEIVER WITH 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: This 16-bit bus transceiver is built using advanced dual metal CMOS Typical tSK(o) (Output Skew) < 250ps technology. This high-speed, low power transceiver is ideal for asynchro- ESD > 2000V per MIL-STD-883, Method 3015 > 200V using nous communication between two busses (A and B). The Direction and machine model (C = 200pF, R = 0) Output Enable controls are designed to operate this device as either two VCC = 3.3V 0.3V, Normal Range independent 8-bit transceivers or one 16-bit transceiver. The direction VCC = 2.7V to 3.6V, Extended Range control pin (DIR) controls the direction of data flow. The output enable pin CMOS power levels (0.4 W typ. static) (OE) overrides the direction control and disables both ports. All inputs are All inputs, outputs, and I/O are 5V tolerant designed with hysteresis for improved noise margin. Available in TSSOP package All pins can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V supply system. DRIVE FEATURES: The LVCH162245A (B port) has been designed with a 24mA output Balanced Output Drivers: 12mA (A port) driver. This driver is capable of driving a moderate to heavy load while High Output Drivers: 24mA (B port) maintaining speed performance. The LVCH162245 (A port) has series resistors in the device output APPLICATIONS: structure which will significantly reduce line noise when used with light loads. 5V and 3.3V mixed voltage systems The driver has been designed to drive 12mA at the designated threshold Data communication and telecommunication systems levels. The LVCH162245A has bus-hold which retains the inputs last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistors. FUNCTIONAL BLOCK DIAGRAM 24 1 1DIR 2DIR 25 48 1OE 2OE 36 47 1A1 2A1 2 13 1B1 2B1 46 35 1A2 2A2 3 14 1B2 2B2 33 44 1A3 2A3 5 16 1B3 2B3 32 43 1A4 2A4 6 17 1B4 2B4 41 30 1A5 2A5 8 19 1B5 2B5 40 29 1A6 2A6 9 20 1B6 2B6 38 27 1A7 2A7 11 22 1B7 2B7 37 26 1A8 2A8 23 12 1B8 2B8 The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE OCTOBER 2015 1 2015 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. DSC-4597/5IDT74LVCH162245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 5V TOLERANT I/O INDUSTRIAL TEMPERATURE RANGE (1) PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Symbol Description Max Unit VTERM Terminal Voltage with Respect to GND 0.5 to +6.5 V TSTG Storage Temperature 65 to +150 C 1DIR 1 48 1OE IOUT DC Output Current 50 to +50 mA 2 1B1 47 IIK Continuous Clamp Current, 50 mA 1A1 IOK VI < 0 or VO < 0 3 1B2 46 1A2 ICC Continuous Current through each 100 mA ISS VCC or GND 4 45 GND GND NOTE: 5 1B3 44 1A3 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation 6 1B4 1A4 43 of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating 7 VCC 42 VCC conditions for extended periods may affect reliability. 8 1B5 41 1A5 9 40 1B6 1A6 10 GND 39 GND CAPACITANCE (TA = +25C, F = 1.0MHz) (1) 1B7 11 38 Symbol Parameter Conditions Typ. Max. Unit 1A7 CIN Input Capacitance VIN = 0V 4.5 6 pF 12 1B8 37 1A8 COUT Output Capacitance VOUT = 0V 6.5 8 pF 13 2B1 36 2A1 CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF NOTE: 14 2B2 35 2A2 1. As applicable to the device type. 15 34 GND GND 16 2B3 33 2A3 PIN DESCRIPTION 17 Pin Names Description 2B4 32 2A4 xOE Output Enable Input (Active LOW) 18 VCC 31 VCC xDIR Direction Control Output 19 30 (1) 2B5 2A5 xA x Side A Inputs or 3-State Outputs (1) xBx Side B Inputs or 3-State Outputs 20 29 2B6 2A6 NOTE: 21 GND 28 GND 1. These pins haveBus-Hol. All other pins are standard inputs, outputs, or I/Os. 22 2B7 27 2A7 23 26 2B8 2A8 (1) FUNCTION TABLE (EACH 8-BIT SECTION) 24 25 2DIR 2OE Inputs xOE xDIR Outputs TSSOP L L B Data to A Bus TOP VIEW L H A Data to B Bus H X High Z State NOTE: 1. H = HIGH Voltage Level X = Dont Care L = LOW Voltage Level Z = High-Impedance 2