OCTAL CHANNEL T1/E1/J1 LONG HAUL/ IDT82V2088 SHORT HAUL LINE INTERFACE UNIT FEATURES: Eight channel T1/E1/J1 long haul/short haul line interfaces - Active level of transmit data (TDATA) and receive data (RDATA) Supports HPS (Hitless Protection Switching) for 1+1 protection - Receiver or transmitter power down without external relays - High impedance setting for line drivers Receiver sensitivity exceeds -36 dB 772KHz and -43 dB 1024 - PRBS (Pseudo Random Bit Sequence) generation and detection 15 KHz with 2 -1 PRBS polynomials for E1 Programmable T1/E1/J1 switchability allowing one bill of ma- - QRSS (Quasi Random Sequence Signals) generation and detection terial for any line condition 20 with 2 -1 QRSS polynomials for T1/J1 Single 3.3 V power supply with 5 V tolerance on digital interfaces - 16-bit BPV (Bipolar Pulse Violation)/Excess Zero/PRBS or QRSS Meets or exceeds specifications in error counter - ANSI T1.102, T1.403 and T1.408 - Analog loopback, Digital loopback, Remote loopback and Inband - ITU I.431, G.703,G.736, G.775 and G.823 loopback - ETSI 300-166, 300-233 and TBR 12/13 Per channel cable attenuation indication - AT&T Pub 62411 Adaptive receive sensitivity Per channel software selectable on: Non-intrusive monitoring per ITU G.772 specification - Wave-shaping templates for short haul and long haul LBO (Line Build Short circuit protection for line drivers Out) LOS (Loss Of Signal) & AIS (Alarm Indication Signal) detection - Line terminating impedance (T1:100 , J1:110 E1:75 120 JTAG interface - Adjustment of arbitrary pulse shape Supports serial control interface, Motorola and Intel Non-Multi- - JA (Jitter Attenuator) position (receive path or transmit path) plexed interfaces - Single rail/dual rail system interfaces Package: - B8ZS/HDB3/AMI line encoding/decoding IDT82V2088: 208-pin PQFP and 208-pin PBGA - Active edge of transmit clock (TCLK) and receive clock (RCLK) DESCRIPTION: The IDT82V2088 can be configured as an octal T1, octal E1 or octal J1 both serial and parallel control interfaces. To facilitate the network mainte- Line Interface Unit. In receive path, an Adaptive Equalizer is integrated to nance, a PRBS/QRSS generation/detection circuit is integrated in each remove the distortion introduced by the cable attenuation. The IDT82V2088 channel, and different types of loopbacks can be set on a per channel basis. also performs clock/data recovery, AMI/B8ZS/HDB3 line decoding and Four different kinds of line terminating impedance, 75 , 100 110 and detects and reports the LOS conditions. In transmit path, there is an AMI/ 120 are selectable on a per channel basis. The chip also provides driver B8ZS/HDB3 encoder, Waveform Shaper and LBOs. There is one Jitter short-circuit protection and supports JTAG boundary scanning. Attenuator for each channel, which can be placed in either the receive path The IDT82V2088 can be used in SDH/SONET, LAN, WAN, Routers, or the transmit path. The Jitter Attenuator can also be disabled. The Wireless Base Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay IDT82V2088 supports both Single Rail and Dual Rail system interfaces and Access Devices, CSU/DSU equipment, etc. The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGES November 2012 1 2012 Integrated Device Technology, Inc. All rights reserved. DSC-6043/5INDUSTRIAL OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT TEMPERATURE RANGES FUNCTIONAL BLOCK DIAGRAM TDO TDI TMS TCK TRST RST REF THZ SCLKE INT/MOT P/S A 7:0 D 7:0 INT SDO SDI/R/W/WR DS/RD SCLK CS MCLKS MCLK Figure-1 Block Diagram 2 One of the Eight Identical Channels LOS/AIS LOSn Detector Receiver RCLKn B8ZS/ Clock and RTIPn Jitter Data Adaptive RDn/RDPn Internal HDB3/AMI Data Attenuator Slicer Equalizer Termination RRINGn CVn/RDNn Decoder Recovery PRBS Detector Analog Digital Remote IBLC Detector Loopback Loopback Loopback B8ZS/ TTIPn TCLKn Transmitter Jitter Waveform Line TDn/TDPn HDB3/AMI Internal Attenuator Shaper/LBO Driver Encoder TRINGn TDNn Termination PRBS Generator IBLC Generator TAOS VDDD Microprocessor G.772 Clock Basic JTAG TAP VDDIO Interface Monitor Generator Control VDDA VDDT VDDR