Low Skew, 1-to-2, 83026I Differential-to-LVCMOS/LVTTL Fanout Datasheet General Description Features The 83026I is a low skew, 1-to-2 Differential-to- LVCMOS/LVTTL Two LVCMOS/LVTTL outputs Fanout Buffer and a member of the family of High Performance Differential CLK/nCLK input pair Clock Solutions from IDT.The differential input can accept most CLK/nCLK pair can accept the following differential differential signal types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL and translate to two single-ended LVCMOS/LVTTL outputs with a Output frequency: 350MHz (typical) maximum output skew of 20ps. The small 8-lead SOIC footprint Output skew: 20ps (maximum) makes this device ideal for use in applications with limited board space. Part-to-part skew: 600ps (maximum) Additive phase jitter, RMS: 0.092ps (typical) Small 8 lead SOIC package saves board space Full 3.3V operating supply -40C to 85C ambient operating temperature Available in lead-free (RoHS 6) package Pin Assignment Block Diagram Q0 VDD nc 1 8 Pulldown CLK CLK 2 7 Q0 Pullup nCLK nCLK 3 6 Q1 Q1 GND nc 4 5 83026I 8-Lead SOIC, 150Mil 3.9mm x 4.9mm x 1.375mm package body M Package Top View 2015 Integrated Device Technology, Inc 1 December 15, 201583026I Datasheet Table 1. Pin Descriptions Number Name Type Description 1, 4 nc Unused No connect. 2 CLK Input Pulldown Non-inverting differential clock input. 3 nCLK Input Pullup Inverting differential clock input. 5 GND Power Power supply ground. 6 Q1 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 7 Q0 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 8V Power Positive supply pin. DD NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4pF IN Input Pullup Resistor 51 k R PULLUP R Input Pulldown Resistor 51 k PULLDOWN Power Dissipation Capacitance C V = 3.6V 23 pF PD DD (per output) R Output Impedance 5 7 12 OUT 2015 Integrated Device Technology, Inc 2 December 15, 2015