Low Skew, 1-to-4 LVCMOS/LVTTL 8304 Fanout Buffer 8304AMLN - PDN CQ-16-01 - LAST TIME BUY EXPIRES MAY 6, 2017 DATA SHEET GENERAL DESCRIPTION FEATURES The 8304 is a low skew, 1-to-4 Fanout Buffer. The 8304 is Four LVCMOS / LVTTL outputs characterized at full 3.3V for input (V ), and mixed 3.3V and 2.5V DD LVCMOS / LVTTL clock input for output operating supply modes (V ). Guaranteed output and DDO part-to-part skew characteristics make the 8304 ideal for those CLK can accept the following input levels: LVCMOS, LVTTL clock distribution applications demanding well de ned performance Maximum output frequency: 200MHz and repeatability. Additive phase jitter, RMS: 0.173ps (typical) 3.3V Output skew: 45ps (maximum) 3.3V Part-to-part skew: 500ps (maximum) Small 8 lead SOIC package saves board space 3.3V input, outputs may be either 3.3V or 2.5V supply modes 0C to 70C ambient operating temperature Available in lead-free (RoHS 6) compliant package BLOCK DIAGRAM PIN ASSIGNMENT Q0 VDDO 1 8 Q3 2 7 VDD Q2 Q1 3 6 CLK Q1 4 5 Pulldown GND Q0 CLK Q2 8304 8-Lead SOIC Q3 3.9mm x 4.9mm, x 1.375mm package body M Package Top View 8304 REVISION H 11/19/15 1 2015 Integrated Device Technology, Inc.8304 DATA SHEET TABLE 1. PIN DESCRIPTIONS Number Name Type Description 1V Power Output supply pin. DDO 2V Power Positive supply pin. DD 3 CLK Input Pulldown LVCMOS / LVTTL clock input. 4 GND Power Power supply ground. 5 Q0 Output Single clock output. LVCMOS / LVTTL interface levels. 6 Q1 Output Single clock output. LVCMOS / LVTTL interface levels. 7 Q2 Output Single clock output. LVCMOS / LVTTL interface levels. 8 Q3 Output Single clock output. LVCMOS / LVTTL interface levels. NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4 pF IN Power Dissipation Capacitance C V , V = 3.465V 15 pF PD DD DDO (per output) R Input Pulldown Resistor 51 k PULLDOWN R Output Impedance 5 7 12 OUT LOW SKEW, 1-TO-4 LVCMOS/LVTTL 2 REVISION H 11/19/15 FANOUT BUFFER