Dual LVCMOS / LVTTL-to-Differential 85322Data Sheet 2.5V / 3.3V LVPECL Translator GENERAL DESCRIPTION FEATURES The 85322 is a Dual LVCMOS / LVTTL-to- Two differential 2.5V/3.3V LVPECL outputs Differential 2.5V / 3.3V LVPECL translator. The 85322 has Selectable CLK0, CLK1 LVCMOS/LVTTL clock inputs selectable single ended clock inputs. The single ended clock input accepts LVCMOS or LVTTL input levels and CLK0 and CLK1 can accepts the following input levels: translate them to 2.5V / 3.3V LVPECL levels. The small LVCMOS or LVTTL outline 8-pin SOIC package makes this device ideal for ap- Maximum output frequency: 267MHz plications where space, high performance and low power are important. Part-to-part skew: 250ps (maximum) 3.3V operating supply voltage (operating range 3.135V to 3.465V) 2.5V operating supply voltage (operating range 2.375V to 2.625V) 0C to 70C ambient operating temperature Lead-Free package available BLOCK DIAGRAM PIN ASSIGNMENT Q0 Q0 VCC CLK0 1 8 nQ0 nQ0 2 7 CLK0 Q1 3 6 CLK1 Q1 CLK1 nQ1 4 5 VEE nQ1 85322 8-Lead SOIC 3.90mm x 4.92mm x 1.37mm body package M Package Top View 2016 Integrated Device Technology, Inc 1 Revision D January 20, 201685322 Data Sheet TABLE 1. PIN DESCRIPTIONS Number Name Type Description 1, 2 Q0, nQ0 Output Differential output pair. LVPECL interface levels. 3, 4 Q1, nQ1 Output Differential output pair. LVPECL interface levels. 5V Power Negative supply pin. EE 6 CLK1 Input Pullup LVCMOS / LVTTL clock input. 7 CLK0 Input Pullup LVCMOS / LVTTL clock input. 8V Power Positive supply pin. CC NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4 pF IN R Input Pullup Resistor 51 k PULLUP 2016 Integrated Device Technology, Inc 2 Revision D January 20, 2016