VCC Low Skew, 1-to-6, Differential-to- ICS853S006I 2.5V, 3.3V LVPECL/ECL Fanout Buffer DATA SHEET General Description Features The ICS853S006I is a low skew, high performance 1-to-6 Six differential 2.5V, 3.3V LVPECL/ECL outputs Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The One differential PCLK, nPCLK input pair ICS853S006I is characterized to operate from either a 2.5V or a PCLK, nPCLK pair can accept the following 3.3V power supply. Guaranteed output and part-to-part skew differential input levels: LVPECL, LVDS, CML characteristics make the ICS853S006I ideal for those clock Maximum output frequency: 2GHz distribution applications demanding well defined performance and Output skew: 50ps (max) repeatability. Part-to-part skew: 230ps (max) Propagation delay: 550ps (max) LVPECL mode operating voltage supply range: V = 2.375V to 3.465V, V = 0V CC EE ECL mode operating voltage supply range: V = 0V, V = -2.375V to -3.465V CC EE -40C to 85C ambient operating temperature Available lead-free (RoHS 6) package Block Diagram Pin Assignment Pulldown Q0 PCLK V 1 20 VCC CC Pullup/Pulldown nQ0 2 19 Q5 nPCLK nQ0 Q0 3 18 nQ5 Q1 nQ1 4 17 Q4 Q1 5 16 nQ4 nQ1 V BB nQ2 6 15 Q3 Q2 Q2 7 14 nQ3 V 8 13 CC nQ2 PCLK 9 12 VEE Q3 nPCLK 10 11 VBB nQ3 ICS853S006I Q4 20-Lead TSSOP nQ4 6.5mm x 4.4mm x 0.92mm package body Q5 G Package nQ5 Top View ICS853S006AGI REVISION A NOVEMBER 15, 2011 1 2011 Integrated Device Technology, Inc.ICS853S006I Data Sheet LOW SKEW, 1-TO-6, DIFFERENTIAL-TO-2.5V, 3.3V LVPECL/ECL FANOUT BUFFER Table 1. Pin Descriptions Number Name Type Description 1, 8, 13, 20 V Power Positive supply pin. CC 2, 3 Output Differential output pair. LVPECL interface levels. nQ0, Q0 4, 5 Output Differential output pair. LVPECL interface levels. nQ1, Q1 6, 7 nQ2, Q2 Output Differential output pair. LVPECL interface levels. 9 PCLK Input Pulldown Non-inverting differential LVPECL clock input. Pullup/ 10 nPCLK Input Inverting differential LVPECL clock input. V /2 default when left floating. CC Pulldown 11 V Output Bias voltage. BB 12 V Power Negative supply pin. EE 14, 15 Output Differential output pair. LVPECL interface levels. nQ3, Q3 16, 17 nQ4, Q4 Output Differential output pair. LVPECL interface levels. 18, 19 Output Differential output pair. LVPECL interface levels. nQ5, Q5 NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Symbol Parameter Test Conditions Minimum Typical Maximum Units Input Pulldown Resistor 75 k R PULLDOWN R Pullup/Pulldown Resistors 50 k VCC/2 ICS853S006AGI REVISION A NOVEMBER 15, 2011 2 2011 Integrated Device Technology, Inc.