Low Skew, 1-to-2 Differential-to-LVDS 85411I Data Sheet Fanout Buffer GENERAL DESCRIPTION FEATURES The 85411I is a low skew, high performance 1-to-2 Differential- Two differential LVDS outputs to-LVDS Fanout Buffer and a member of the family of High One differential CLK, nCLK clock input Performance Clock Solutions from IDT. The CLK, nCLK pair can accept most standard differential input levels.The 85411I is CLK, nCLK pair can accept the following differential characterized to operate from a 3.3V power supply. Guaranteed input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL output and part-to-part skew characteristics make the 85411I ideal Maximum output frequency: 650MHz for those clock distribution applications demanding well de ned performance and repeatability. Translates any single ended input signal to LVDS levels with resistor bias on nCLK input Output skew: 25ps (maximum) Part-to-part skew: 300ps (maximum) Additive phase jitter, RMS: 0.05ps (typical) Propagation delay: 2.5ns (maximum) 3.3V operating supply -40C to 85C ambient operating temperature Available in lead free (RoHS 6) package BLOCK DIAGRAM PIN ASSIGNMENT Q0 Q0 1 8 VDD nQ0 CLK nQ0 CLK 2 7 nCLK Q1 3 6 nCLK Q1 nQ1 4 5 GND nQ1 85411I 8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View 2016 Integrated Device Technology, Inc 1 Revision B January 20, 201685411I Data Sheet TABLE 1. PIN DESCRIPTIONS Number Name Type Description 1, 2 Q0, nQ0 Output Differential output pair. LVDS interface levels. 3, 4 Q1, nQ1 Output Differential output pair. LVDS interface levels. 5 GND Power Power supply ground. 6 nCLK Input Pulldown Inverting differential clock input. 7 CLK Input Pullup Non-inverting differential clock input. 8V Power Positive supply pin. DD NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter Test Conditions Minimum Typical Maximum Units C Input Capacitance 4 pF IN R Input Pullup Resistor 51 k PULLUP R Input Pulldown Resistor 51 k PULLDOWN 2016 Integrated Device Technology, Inc 2 Revision B January 20, 2016