Crystal or Differential-to-LVCMOS/ 8L30205 LVTTL Clock Buffer Datasheet Description Features The 8L30205 is a low skew, 1-to-5 LVCMOS / LVTTL fanout buffer. Five LVCMOS / LVTTL outputs up to 200MHz The low impedance LVCMOS/LVTTL outputs are designed to Differential input pair can accept the following differential input drive 50 series or parallel terminated transmission lines. levels: LVPECL, LVDS, HCSL The 8L30205 is characterized at full 3.3V and 2.5V, mixed Crystal oscillator interface 3.3V/2.5V, 3.3V/1.8V, 3.3V/1.5V, 2.5V/1.8V and 2.5V/1.5V output Crystal input frequency range: 10MHz to 40MHz operating supply modes. The input clock is selected with a differential clock input or a crystal input. The differential input can Additive RMS phase jitter: 30fs (typical) be wired to accept a single-ended input. The internal oscillator Synchronous output enable to avoid clock glitch circuit is automatically disabled if the crystal input is not selected. Power supply modes: Core / Output 3.3V / 3.3V 2.5V / 2.5V 3.3V / 2.5V 3.3V / 1.8V 3.3V / 1.5V 2.5V / 1.8V 2.5V / 1.5V -40C to 85C ambient operating temperature Supports case temperature up to 105C Available in lead-free (RoHS 6) package Block Diagram BankA Pulldown SEL Q0 Pulldown CLK Q1 0 Pullup/Pulldown nCLK BankB Q2 XTAL OUT 1 OSC XTAL IN Q3 Q4 Pulldown OE SYNC 2017 Integrated Device Technology, Inc. 1 May 3, 20178L30205 Datasheet Pin Assignments 24 23 22 21 20 19 GND 1 18 V DDO V 2 17 Q4 DDO 16 Q0 3 GND 8L30205 GND 4 15 Q3 Q1 5 14 V DDO V 6 13 Q2 DDO 7 8 910 11 12 24-pin,4mmx4mmVFQFNPackage Pin Characteristics a Table 1. Pin Descriptions Number Name Type Description 1 GND Power Power supply ground. 2V Power Output power supply pin for Bank A. DDO 3 Q0 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 4 GND Power Power supply ground. 5 Q1 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 6V Power Output power supply pin for Bank A. DDO 7 GND Power Power supply ground. 8V Power Power supply pin. DD 9 XTAL IN Input Crystal oscillator interface. XTAL IN is the input. 10 XTAL OUT Input Crystal oscillator interface. XTAL OUT is the output. 11 GND Power Power supply ground. 12 GND Power Power supply ground. 13 Q2 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 14 V Power Output power supply pin for Bank B. DDO 15 Q3 Output Single-ended clock output. LVCMOS/LVTTL interface levels. 2017 Integrated Device Technology, Inc. 2 May 3, 2017 GND OE V V DD DD XTAL IN SEL XTAL OUT CLK GND nCLK GND GND