16-Port, Bi-directional M-LVDS Clock 8V54816A Datasheet Cross-Point Switch Description Features Sixteen bi-directional M-LVDS ports The 8V54816A is a 16-port, bi-directional cross-point clock switch designed for clock distribution in MicroTCA.4 systems. It features Operating frequency: up to 350MHz (maximum) 16 bi-directional M-LVDS ports. Each port can be individually set Switchable termination resistors as input or output. Each output port can be connected to any port 2 I C support with read-back capabilities up to 400kHz defined as input. Each port features switchable termination (ON: PCI Express (2.5Gb/S), Gen 2 (5Gb/s) and Gen 3 (8Gb/s) jitter 100 , OFF: High impedance). Output ports can drive up to compliant 19-inch PCB tracks with M-LVDS levels. The device is optimized for very low additive phase noise. Configuration of the device is Architecturally compliant with MicroTCA.4 specification 2 achieved by I C. At startup, a default configuration is set where all Output polarity inversion ports are in High-Impedance mode with outputs disabled. Support for 1PPS signals Full 3.3V supply voltage 12 12 mm, 100-lead VFQFN Epad size: 6.9 6.9 mm 0 to +70C ambient operating temperature Lead-free (RoHS 6) packaging Block Diagram Termination Enable R T 16:1 CLK0 Mux nCLK0 I/OPort Select0 Termination Enable RT 16:1 CLK1 Mux nCLK1 I/OPort Select1 Termination Enable RT 16:1 CLK15 Mux nCLK15 VDDVDD VDD I/OPort Select15 I/OPort SDATA Termination Select Enable SCLK S A1 2 I CController S A0 nMR GNDGND 2020 Renesas Electronics Corporation 1 October 27, 20208V54816A Datasheet Contents Description 1 Features 1 Block Diagram . 1 Pin Assignment 3 Pin Descriptions and Characteristics 4 Serial Interface Configuration Description 6 Absolute Maximum Ratings . 7 DC Electrical Characteristics 7 AC Electrical Characteristics 8 Parameter Measurement Information . 10 Applications Information . 11 Port Termination 12 Polarity Inversion 13 Port Configuration Example . 14 Recommendations for Unused Input Pins . 15 Differential Clock Input Interface 16 3.3V M-LVDS Driver Termination . 16 VFQFN EPAD Thermal Release Path . 17 PCI Express Application Note 18 Power Considerations 20 Reliability Information . 21 Transistor Count . 21 Package Outline Drawings . 21 Marking Diagram 21 Ordering Information . 21 Revision History . 22 2020 Renesas Electronics Corporation 2 October 27, 2020