DATASHEET 9DB401C Four Output Differential Buffer for PCI Express Description Features/Benefits Spread spectrum modulation tolerant, 0 to -0.5% down The 9DB401C is a DB400 Version 2.0 Yellow Cover part with spread and +/- 0.25% center spread PCI Express support. It can be used in PC or embedded systems to provide outputs that have low cycle-to-cycle jitter Supports undriven differential outputs in PD and (50ps), low output-to-output skew (100ps), and are PCI Express SRC STOP modes for power management. gen 1 compliant. The 9DB401C supports a 1 to 4 output configuration, taking a spread or non spread differential HCSL Key Specifications input from a CK410(B) main clock such as 954101 and Outputs cycle-cycle jitter: < 50ps 932S401, or any other differential HCSL pair. 9DB401C can Outputs skew: < 50ps generate HCSL or LVDS outputs from 50 to 200MHz in PLL mode or 0 to 400Mhz in bypass mode. There are two de-jittering Extended frequency range in bypass mode: modes available selectable through the HIGH BW input pin, Revision B: up to 333.33MHz high bandwidth mode provides de-jittering for spread inputs and Revision C: up to 400MHz low bandwidth mode provides extra de-jittering for non-spread Real-time PLL lock detect output pin inputs. The SRC STOP , PD , and OE real-time input pins 28-pin SSOP/TSSOP package provide completely programmable power management control. Available in RoHS compliant packaging Output Features 4 - 0.7V HCSL or LVDS differential output pairs Supports zero delay buffer mode and fanout mode Bandwidth programming available Functional Block Diagram 2 OE (1,6) Spread -SRC IN Compatible PLL -SRC IN M Stop 4 U DIF (1,2,5,6) Logic X -PD -BYPASS /PLL Control Logic -SDATA -SCLK IREF Note: Polarities shown for OE INV = 0. IDT Four Output Differential Buffer for PCI Express 9DB401C REV H 01/27/11 19DB401C Four Output Differential Buffer for PCI Express Pin Configuration VDD 1 28 VDDA VDD 1 28 VDDA SRC IN 2 27 GNDA SRC IN 2 27 GNDA SRC IN 3 26 IREF SRC IN 3 26 IREF GND425 OE INV GND 4 25 OE INV 524VDD VDD VDD 5 24 VDD DIF 1623 DIF 6 DIF 1 6 23 DIF 6 DIF 1 722 DIF 6 DIF 1 7 22 DIF 6 OE1 821 OE6 821 OE 1 OE 6 DIF 2920 DIF 5 DIF 2 9 20 DIF 5 DIF 2 10 19 DIF 5 DIF 2 10 19 DIF 5 VDD 11 18 VDD VDD 11 18 VDD 12 17 HIGH BW BYPASS /PLL BYPASS /PLL 12 17 HIGH BW SCLK 13 16 SRC STOP SCLK 13 16 SRC STOP 14 15 PD SDATA SDATA 14 15 PD OE INV = 1 OE INV = 0 28-pin SSOP & TSSOP Polarity Inversion Pin List Table Power Groups Pin Number OE INV Description VDD GND Pins 01 1 4 SRC IN/SRC IN 8 OE 1 OE1 5,11,18, 24 4 DIF(1,2,5,6) 15 PD PD N/A 27 IREF 16 DIF STOP DIF STOP 28 27 Analog VDD & GND for PLL core 21 OE 6 OE6 IDT Four Output Differential Buffer for PCI Express 9DB401C REV H 01/27/11 2 ICS9DB401 (same as ICS9DB104) ICS9DB401