DATASHEET ICS9DB403D Four Output Differential Buffer for PCIe Gen 1 and Gen 2 Description Features/Benefits Spread spectrum modulation tolerant, 0 to -0.5% down The ICS9DB403 is compatible with the Intel DB400v2 Differential spread and +/- 0.25% center spread. Buffer Specification. This buffer provides 4 PCI-Express Gen2 clocks. The ICS9DB403 is driven by a differential output pair from a Supports undriven differential outputs in PD and CK410B+, CK505 or CK509B main clock generator. SRC STOP modes for power management. Key Specifications Output Features 4 - 0.7V current-mode differential output pairs Outputs cycle-cycle jitter < 50ps Supports zero delay buffer mode and fanout mode Outputs skew: 50ps Bandwidth programming available Phase jitter: PCIe Gen1 < 86ps peak to peak 50-100 MHz operation in PLL mode Phase jitter: PCIe Gen2 < 3.0/3.1ps rms 50-400 MHz operation in Bypass mode 28-pin SSOP/TSSOP pacakge Available in RoHS compliant packaging Supports Commercial (0 to +70C) and Industrial (-40 to +85C) temperature ranges Functional Block Diagram 4 2 OE(6,5,2,1)-OE(6, 1) SPREAD SRC IN COMPATIBLE PLL SRC IN 4 M STOP DIF(6,5,2,1) U LOGIC X PD BYPASS /PLL CONTROL SDATA LOGIC SCLK IREF Note: Polarities shown for OE INV = 0. IDT Four Output Differential Buffer for PCIe and Gen 1 and Gen 2 ICS9DB403D REV R 11/1/12 1ICS9DB403D Four Output Differential Buffer for PCIe for Gen 1 and Gen 2 Pin Configuration VDDR 1 28 VDDA VDDR 1 28 VDDA SRC IN 2 27 GNDA SRC IN 2 27 GNDA SRC IN 3 26 IREF SRC IN 3 26 IREF GND 4 25 OE INV GND 4 25 OE INV VDD 5 24 VDD VDD 5 24 VDD DIF 1 6 23 DIF 6 DIF 1 6 23 DIF 6 DIF 1 7 22 DIF 6 DIF 1 7 22 DIF 6 OE 1 8 21 OE 6 OE1 821 OE6 DIF 2 9 20 DIF 5 DIF 2 9 20 DIF 5 DIF 2 10 19 DIF 5 DIF 2 10 19 DIF 5 VDD 11 18 VDD VDD 11 18 VDD BYPASS /PLL 12 17 HIGH BW BYPASS /PLL 12 17 HIGH BW SCLK 13 16 DIF STOP SCLK 13 16 DIF STOP SDATA 14 15 PD SDATA 14 15 PD OE INV = 0 OE INV = 1 28-pin SSOP & TSSOP Polarity Inversion Pin List Table Power Groups OE INV Pin Number Description VDD GND Pins 01 1 4 SRC IN/SRC IN 8 OE 1 OE1 5,11,18, 24 4 DIF(1,2,5,6) 15 PD PD N/A 27 IREF 16 DIF STOP DIF STOP 28 27 Analog VDD & GND for PLL core 21 OE 6 OE6 IDT Four Output Differential Buffer for PCIe Gen 1 and Gen 2 ICS9DB403D REV R 11/1/12 2 ICS9DB403D (same as ICS9DB104) ICS9DB403D (same as ICS9DB401)