9DBL02x3/9DBL04x3/ 9DBL06x3/9DBL08x3 2 to 8-Output 3.3V PCIe Zero-Delay/Fanout Buffers with LOS Datasheet Description Features LOS open-drain output indicates loss of input clock The 9DBL02x3/9DBL04x3/ 9DBL06x3/9DBL08x3 buffers are low-power, high-performance members of Renesas full featured 2 to 8 Low-Power HCSL (LP-HCSL) outputs eliminate 4 PCIe family. The buffers support PCIe Gen15 and provide a Loss resistors per output pair of Signal (LOS) indicator. 9DBLxx4x devices provide integrated 100 terminations 9DBLxx5x devices provide integrated 85 terminations PCIe Clocking Architectures See AN-891 for easy coupling to other logic families Common Clocked (CC) Spread-spectrum compatible Independent Reference (IR) with/without SSC (SRIS, SRNS) Dedicated OE pin for each output 1MHz to 200MHz operation in fan-out mode Typical Applications 3 selectable SMBus addresses Extensive SMBus-selectable features allow optimization to PCIe Riser Cards customer requirements nVME Storage SMBus interface not required for device operation Networking -40C to +85C operating temperature range Accelerators Space-saving 4 4 mm 24-VFQFPN to 6 6 mm 48-VFQFPN Industrial Control/Embedded packages (see Ordering Information table for details) Key Specifications Additive PCIe Gen5 CC jitter < 60fs RMS (fanout mode) PCIe Gen5 CC jitter < 150fs RMS (High-BW ZDB Mode) Block Diagram FB DNC FB DNC PLL CLK IN DIFn CLK IN DIFn 2, 4, 6, 8 Outputs vSADR tri SMBus Factory n = 1, 3, 5, 7 SCLK 3.3 Engine Configuration SDATA 3.3 DIF0 vHIBW BYPM-LOBW DIF0 CKPWRGD PD Control Logic n+1 vOE n:0 LOS LOS Logic 2020 Renesas Electronics Corporation 1 August 13, 20209DBL02x3/9DBL04x3/ 9DBL06x3/9DBL08x3 Datasheet Contents Description 1 PCIe Clocking Architectures . 1 Typical Applications . 1 Key Specifications 1 Features 1 Block Diagram . 1 Pin Assignments 3 9DBL02x3 Pin Assignment . 3 9DBL04x3 Pin Assignment . 3 9DBL06x3 Pin Assignment . 4 9DBL08x3 Pin Assignment . 4 Pin Descriptions 5 Absolute Maximum Ratings . 7 Electrical Characteristics . 8 Power Management 14 ZDB Operating Mode . 14 Test Loads . 15 General SMBus Serial Interface Information . 16 How to Write . 16 How to Read . 16 Package Outline Drawings . 24 Thermal Characteristics . 24 Marking Diagrams . 25 9DBL02x3 . 25 9DBL04x3 . 25 9DBL06x3 . 25 9DBL08x3 . 25 Ordering Information . 26 Revision History . 27 2020 Renesas Electronics Corporation 2 August 13, 2020