CDP68HC68T1 Data Sheet October 29, 2007 FN1547.8 CMOS Serial Real-Time Clock With RAM Features and Power Sense/Control SPI (Serial Peripheral Interface) The CDP68HC68T1 Real-Time Clock provides a Full Clock Features time/calendar function, a 32 byte static RAM, and a 3 wire - Seconds, Minutes, Hours (12/24, AM/PM), Day of Serial Peripheral Interface (SPI Bus). The primary function of Week, Date, Month, Year (0 to 99), Automatic Leap Year the clock is to divide down a frequency input that can be 32 Wordx8-Bit RAM supplied by the on-board oscillator in conjunction with an external crystal or by an external clock source. The internal Seconds, Minutes, Hours Alarm oscillator can operate with a 32kHz, 1MHz, 2MHz, or 4MHz Automatic Power Loss Detection crystal. An external clock source with a 32kHz, 1MHz, 2MHz, Low Minimum Standby (Timekeeping) Voltage . 2.2V 4MHz, 50Hz or 60Hz frequency can be used to drive the CDP68HC68T1. The time registers hold seconds, minutes, Selectable Crystal or 50/60Hz Line Input and hours, while the calendar registers hold day-of-week, Buffered Clock Output date, month, and year information. The data is stored in BCD format. In addition, 12 or 24 hour operation can be selected. Battery Input Pin that Powers Oscillator and also Connects to V Pin When Power Fails In 12 hour mode, an AM/PM indicator is provided. The T1 DD has a programmable output which can provide one of seven Three Independent Interrupt Modes outputs for use elsewhere in the system. -Alarm - Periodic Computer handshaking is controlled with a wired-OR interrupt - Power-Down Sense output. The interrupt can be programmed to provide a signal as the result of: Pb-Free Available (RoHS Compliant) 1. An alarm programmed to occur at a predetermined combination of seconds, minutes, and hours. 2. One of 15 periodic interrupts ranging from sub-second to once per day frequency. 3. A power fail detect. The PSE output and the V input are SYS used for external power control. The CPUR output is available to reset the processor under power-down is enabled under software control and conditions. CPUR can also be activated via the CDP68HC68T1s watchdog. If enabled, the watchdog requires a periodic toggle of the CE pin without a serial transfer. Pinouts CDP68HC68T1 CDP68HC68T1 (16 LD PDIP, SOIC) (20 LD SOIC) TOP VIEW TOP VIEW 1 CLKOUT 16 V CLK OUT 1 20 VDD DD CPUR CPUR 2 15 XTAL OUT 2 19 XTAL OUT INT 3 14 XTAL IN INT 3 18 XTAL IN SCK 4 13 V NC 4 17 NC BATT MOSI 5 12 V SCK 5 V 16 SYS BATT MISO 6 11 LINE MOSI 6 15 V SYS CE 7 10 POR MISO 7 14 NC V 8 9 PSE CE 8 13 NC SS V 9 12 LINE SS PSE 10 11 POR CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Harris Corporation 1997. Copyright Intersil Americas Inc. 2001, 2004-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.CDP68HC68T1 Ordering Information PART NUMBER PART MARKING TEMP RANGE (C) PACKAGE PKG DWG. CDP68HC68T1E CDP68HC68T1E -40 to +85 16 Ld PDIP E16.3 CDP68HC68T1EZ (Note) CDP68HC68T1EZ -40 to +85 16 Ld PDIP** E16.3 (Pb-free) CDP68HC68T1M* 68HC68T1M -40 to +85 20 Ld SOIC M20.3 Tape and Reel CDP68HC68T1MZ* (Note) 68HC68T1MZ -40 to +85 20 Ld SOIC (Pb-free) M20.3 Tape and Reel CDP68HC68T1M2* HC68T1M2 -40 to +85 16 Ld SOIC M16.3 Tape and Reel CDP68HC68T1M2Z* (Note) HC68T1M2Z -40 to +85 16 Ld SOIC (Pb-free) M16.3 Tape and Reel *Add 96 suffix for tape and reel. Please refer to TB347 for details on reel specifications. **Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. FN1547.8 2 October 29, 2007