HI-546, HI-547, HI-548, HI-549 Data Sheet June 15, 2016 FN3150.7 Single 16 and 8, Differential 8-Channel Features and 4-Channel CMOS Analog MUXs with Analog Overvoltage Protection 70V P-P Active Overvoltage Protection No Channel Interaction During Overvoltage The HI-546, HI-547, HI-548 and HI-549 are analog Matching Guaranteed r multiplexers with active overvoltage protection and ON guaranteed r matching. Analog input levels may greatly Maximum Power Supply 44V ON exceed either power supply without damaging the device or Break-Before-Make Switching disturbing the signal path of other channels. Active protection circuitry assures that signal fidelity is maintained Analog Signal Range 15V even under fault conditions that would destroy other Access Time (Typical) . 500ns multiplexers. Standby Power (Typical) 7.5mW Analog inputs can withstand constant 70V levels with P-P Pb-Free Plus Anneal Available (RoHS Compliant) 15V supplies. Digital inputs will also sustain continuous faults up to 4V greater than either supply. In addition, signal Applications sources are protected from short circuiting should multiplexer supply loss occur. Each input presents 1k of Data Acquisition resistance under this condition. These features make the Industrial Controls HI-546, HI-547, HI-548 and HI-549 ideal for use in systems Telemetry where the analog inputs originate from external equipment or separately powered circuitry. All devices are fabricated with 44V Dielectrically Isolated CMOS technology. The HI-546 is a single 16-Channel, the HI-547 is an 8-Channel differential, the HI-548 is a single 8-Channel and the HI-549 is a 4-Channel differential device. If input overvoltage protection is not needed the HI-506/507/508/509 multiplexers are recommended. For further information see Application Notes AN520 and AN521. For MIL-STD-883 compliant parts, request the HI-546/883, HI-547/883, HI-548/883 and HI-549/883 datasheets. CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 321-724-7143 Intersil (and design) is a registered trademark of Intersil Americas LLC Copyright Intersil Americas LLC 2003, 2005, 2015. All Rights Reserved All other trademarks mentioned are the property of their respective owners.HI-546, HI-547, HI-548, HI-549 Ordering Information TEMP. o PART NUMBER PART MARKING RANGE ( C) PACKAGE PKG. DWG. HI1-0546-2 HI1-546-2 -55 to 125 28 Ld CERDIP F28.6 HI3-0546-5Z (Note) (No longer available, recommended HI3-546-5Z 0 to 75 28 Ld PDIP* (Pb-free) E28.6 replacement: HI9P0546-9Z, HI4P0546-5Z) HI4P0546-5Z (Note) HI4P546-5Z 0 to 75 28 Ld PLCC (Pb-free) N28.45 HI9P0546-9Z** (Note) HI9P546-9Z -40 to 85 28 Ld SOIC (Pb-free) M28.3 HI3-0547-5Z (Note) HI3-0547-5Z 0 to 75 28 Ld PDIP* (Pb-free) E28.6 HI4P0547-5Z (Note) (No longer available, recommended HI4P547-5Z 0 to 75 28 Ld PLCC (Pb-free) N28.45 replacement: HI3-0547-5Z) HI9P0547-9Z** (Note) HI9P547-9Z -40 to 85 28 Ld SOIC (Pb-free) M28.3 HI1-0548-2 HI1-548-2 -55 to 125 16 Ld CERDIP F16.3 HI3-0548-5Z (Note) HI3-548-5Z 0 to 75 16 LEAD PDIP (Pb-Free) E16.3 HI9P0548-5Z** (Note) HI9P548-5Z 0 to 75 16 Ld SOIC (Pb-free) M16.15 HI9P0548-9Z (Note) HI9P548-9Z -40 to 85 16 Ld SOIC (Pb-free) M16.15 HI1-0549-2 HI1-549-2 -55 to 125 16 Ld CERDIP F16.3 HI3-0549-5 (No longer available or supported) HI3-549-5 0 to 75 16 Ld PDIP E16.3 HI3-0549-5Z (Note) HI3-549-5Z 0 to 75 16 Ld PDIP E16.3 (Pb-Free HI4P0549-5Z (Note) HI4P549-5Z 0 to 75 20 Ld PLCC (Pb-free) N20.35 (No longer available or supported) HI9P0549-9Z (Note) HI9P549-9Z -40 to 85 16 Ld SOIC (Pb-free) M16.15 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. **Add 96 suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinouts HI-546 (CERDIP, PDIP, SOIC) HI-547 (CERDIP, PDIP, SOIC) TOP VIEW TOP VIEW +V 1 28 OUT A +V 1 28 OUT SUPPLY SUPPLY OUT B 2 27 -V NC 2 27 -V SUPPLY SUPPLY NC 3 26 IN 8A NC 3 26 IN 8 25 IN 7 IN 8B 4 25 IN 7A IN 16 4 IN 15 5 24 IN 6 IN 7B 5 24 IN 6A IN 14 6 23 IN 5 IN 6B 6 23 IN 5A IN 13 7 22 IN 4 IN 5B 7 22 IN 4A 21 IN 3A IN 12 8 21 IN 3 IN 4B 8 20 IN 11 9 20 IN 2 IN 3B 9 IN 2A IN 2B 10 19 IN 1A IN 10 10 19 IN 1 IN 1B 11 18 ENABLE IN 9 11 18 ENABLE GND 12 17 ADDRESS A GND 12 17 ADDRESS A 0 0 V 13 16 ADDRESS A V 13 16 ADDRESS A REF 1 REF 1 ADDRESS A 14 15 ADDRESS A NC 14 15 ADDRESS A 3 2 2 2