DATASHEET ISL23415 FN7780 Rev 2.00 Single, Low Voltage Digitally Controlled Potentiometer (XDCP) September 14, 2015 The ISL23415 is a volatile, low voltage, low noise, low power, Features SPI bus, 256 taps, single digitally controlled potentiometer 256 resistor taps (DCP), which integrates DCP core, wiper switches and control logic on a monolithic CMOS integrated circuit. SPI serial interface - No additional level translator for low bus supply The digitally controlled potentiometer is implemented with a - Daisy Chaining of multiple DCP combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the Power supply SPI bus interface. The potentiometer has an associated -V = 1.7V to 5.5V analog power supply CC volatile Wiper Register (WR) that can be directly written to and -V = 1.2V to 5.5V SPI bus/logic power supply read by the user. The contents of the WR controls the position LOGIC of the wiper. When powered on, the ISL23415s wiper will Wiper resistance: 70 typical V = 3.3V CC always commence at mid-scale (128 tap position). Shutdown Mode - forces the DCP into an end-to-end open The low voltage, low power consumption, and small package circuit and RW is shorted to RL internally of the ISL23415 make it an ideal choice for use in battery Power-on preset to mid-scale (128 tap position) operated equipment. In addition, the ISL23415 has a V LOGIC Shutdown and standby current <2.8A max pin allowing down to 1.2V bus operation, independent from the V value. This allows for low logic levels to be connected CC DCP terminal voltage from 0V to V CC directly to the ISL23415 without passing through a voltage 10k 50k or 100k total resistance level shifter. Extended industrial temperature range: -40C to +125C The DCP can be used as a three-terminal potentiometer or as a 10 Ld MSOP or 10 Ld TQFN packages two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal Pb-free (RoHS compliant) processing. Applications Power supply margining RF power amplifier bias compensation LCD bias compensation Gain adjustment in battery powered instruments Portable medical equipment calibration 10000 8000 6000 4000 2000 0 0 50 100 150 200 250 TAP POSITION (DECIMAL) FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP FIGURE 2. V ADJUSTMENT REF POSITION, 10k FN7780 Rev 2.00 Page 1 of 20 September 14, 2015 RESISTANCE ()ISL23415 Block Diagram V V CC LOGIC RH SCK POWER-UP INTERFACE, SDI I/O BLOCK LEVEL CONTROL WR SDO SHIFTER AND VOLATILE STATUS CS REGISTER LOGIC AND WIPER CONTROL CIRCUITRY RL RW GND Pin Configurations Pin Descriptions ISL23415 (10 LD MSOP) MSOP TQFN SYMBOL DESCRIPTION TOP VIEW 110 V SPI bus/logic supply. LOGIC O 10 GND V 1 LOGIC Range 1.2V to 5.5V SCK 2 V 9 CC 2 1 SCK Logic Pin - Serial bus clock input RH SDO 3 8 3 2 SDO Logic Pin - Serial bus data output 7 SDI 4 RW (configurable) CS RL 5 6 4 3 SDI Logic Pin - Serial bus data input 5 4 CS Logic Pin - Active low Chip Select ISL23415 65 RL DCP low terminal (10 LD TQFN) TOP VIEW 76 RW DCP wiper terminal 8 7 RH DCP high terminal 98 V Analog power supply. CC O Range 1.7V to 5.5V SCK 1 9 GND 10 9 GND Ground pin SDO 2 8 V CC SDI 3 7 RH CS 4 6 RW FN7780 Rev 2.00 Page 2 of 20 September 14, 2015 RL 5 10 V LOGIC