Quad, 128 Tap, Low Voltage Digitally Controlled Potentiometer (XDCP) ISL23448 Features Four potentiometers per package The ISL23448 is a volatile, low voltage, low noise, low power, 128 tap, quad digitally controlled potentiometer (DCP) with an 128 resistor taps SPI Bus interface. It integrates four DCP cores, wiper 10k , 50k or 100k total resistance switches and control logic on a monolithic CMOS integrated circuit. SPI serial interface - No additional level translator for low bus supply Each digitally controlled potentiometer is implemented with a - Daisy Chaining of multiple DCPs combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the Power supply SPI bus interface. Each potentiometer has an associated -V = 1.7V to 5.5V analog power supply CC volatile Wiper Register (WRi, i = 0, 1, 2, 3) that can be directly -V = 1.2V to 5.5V SPI bus/logic power supply LOGIC written to and read by the user. The contents of the WRi controls the position of the wiper. When powered on, the wiper Maximum supply current without serial bus activity of each DCP will always commence at mid-scale (64 tap (standby) position). - 5A V and V = 5V CC LOGIC The low voltage, low power consumption, and small package - 2A V and V = 1.7V CC LOGIC of the ISL23448 make it an ideal choice for use in battery Shutdown Mode operated equipment. In addition, the ISL23448 has a V LOGIC - Forces the DCP into an end-to-end open circuit and RWi is pin allowing down to 1.2V bus operation, independent from the connected to RLi internally V value. This allows for low logic levels to be connected CC directly to the ISL23448 without passing through a voltage - Reduces power consumption by disconnecting the DCP level shifter. resistor from the circuit The DCP can be used as a three-terminal potentiometer or as a Wiper resistance: 70 typical V = 3.3V CC two-terminal variable resistor in a wide variety of applications Power-on preset to mid-scale (64 tap position) including control, parameter adjustments, and signal processing. Extended industrial temperature range: -40C to +125C Applications 20 Ld TSSOP or 20 Ld QFN packages Power supply margining Pb-free (RoHS compliant) Trimming sensor circuits Gain adjustment in battery powered instruments RF power amplifier bias compensation 10000 V REF 8000 6000 RH1 - V REF M 4000 1 DCP RW1 OF + ISL23448 2000 ISL28114 RL1 0 032 64 96 128 TAP POSITION (DECIMAL) FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP FIGURE 2. V ADJUSTMENT REF POSITION, 10k DCP August 19, 2011 CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Copyright Intersil Americas Inc. 2011. All Rights Reserved FN7905.0 Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners RESISTANCE ( )ISL23448 Block Diagram V V LOGIC CC RH0 WR0 RW0 VOLATILE SDI POWER UP REGISTER RL0 SDO INTERFACE RH1 I/O CONTROL LEVEL SCK WR1 BLOCK AND SHIFTER RW1 VOLATILE STATUS CS REGISTER LOGIC RL1 RH2 WR2 RW2 VOLATILE REGISTER RL2 RH3 WR3 RW3 VOLATILE REGISTER RL3 GND Pin Configurations Pin Descriptions ISL23448 TSSOP QFN SYMBOL DESCRIPTION (20 LD TSSOP) TOP VIEW 1 19 RL0 DCP0 low terminal 1 RL0 20 RL3 2 20 RW0 DCP0 wiper terminal RW0 2 19 RW3 31 V Analog power supply. CC V 3 18 RH3 CC Range 1.7V to 5.5V RH0 4 17 RL2 42 RH0 DCP0 high terminal RL1 5 RW2 16 5 3 RL1 DCP1 low terminal RW1 6 15 RH2 6 4 RW1 DCP1 wiper terminal RH1 7 14 SCK GND 8 13 SDO 75 RH1 DCP1 high terminal V 9 12 GND LOGIC 8, 12 6, 10 GND Ground pin SDI 10 11 CS 97 V SPI bus/logic supply LOGIC Range 1.2V to 5.5V ISL23448 10 8 SDI Logic Pin - Serial bus data input (20 LD QFN) 11 9 CS Logic Pin - Active low chip select TOP VIEW 13 11 SDO Logic Pin - Serial bus data output (configurable) 20 19 18 17 14 12 SCK Logic Pin - Serial bus clock input V 1 166 RH3 15 13 RH2 DCP2 high terminal CC RL2 16 14 RW2 DCP2 wiper terminal 2 15 RH0 17 15 RL2 DCP2 low terminal RW2 3 14 RL1 18 16 RH3 DCP3 high terminal 13 RH2 4 RW1 19 17 RW3 DCP3 wiper terminal SCK 5 12 RH1 20 18 RL3 DCP3 low terminal 11 SDO GND 6 78 9 10 FN7905.0 2 August 19, 2011 V RW0 LOGIC RL0 SDI RL3 CS GND RW3