DATASHEET ISL6442 FN9204 Rev 2.00 Dual (180 Out-of-Phase) PWM and Linear Controller Oct 31, 2008 The ISL6442 is a high-performance, triple output controller Features that provides a single high-frequency power solution 4.5V to 5.5V or 5.5V to 24V Input Voltage Range primarily for Broadband, DSL and Networking applications. 1.5% PWM Switcher Reference Accuracy Over Line and This device integrates complete control, monitoring and Temperature protection functions for two synchronous buck PWM controllers and one linear controller. Input voltage ripple and Three Programmable Power Output Voltages total RMS input current is substantially reduced by - Two PWM Controllers with Out-of-Phase Operation synchronized 180 out-of-phase operation of the two PWMs. - Voltage-Mode PWM Control - One Linear Controller The two PWM buck converters provide simple voltage mode control. The output voltage of the converters can be Programmable Switching Frequency from 300kHz to 2.5MHz precisely regulated to as low as 0.6V, with a maximum Fast Transient Response tolerance of 1.5% over temperature and line variations. - High-Bandwidth Error Amplifier Programmable switching frequency up to 2.5MHz provides Extensive Circuit Protection Functions fast transient response and small external components. The linear controller provides a low-current output. - Overvoltage, Undervoltage, and Overtemperature - Programmable Overcurrent Limit with Hiccup Mode The ISL6442 has voltage-tracking capability. Each controller Operation has soft-start and independent enable functions combined - Lossless Current Sensing (No Sense Resistor Needed) on a single pin. A capacitor from SS/EN to ground sets the soft-start time pulling SS/EN pin below 1V disables the Externally Adjustable Soft-Start Time controller. Both outputs can soft-start into a pre-biased load. - Independent Enable Control - Voltage Tracking Capability The ISL6442 incorporates robust protection features. An - Able to Soft-Start into a Pre-Biased Load adjustable overcurrent protection circuit monitors the output current by sensing the voltage drop across the upper PGOOD Output with Delay MOSFET r . Hiccup mode overcurrent operation DS(ON) 24 Ld QSOP protects the DC/DC converters from damage under over Pb-Free (RoHS Compliant) load and short circuit conditions. A PGOOD signal is issued when soft-start is complete and PWM outputs are within 10% Applications of their regulated values and the linear regulator output is higher than 75% of its nominal value. Thermal shut-down Complete 1 Chip Solution for DSL Modems/Routers circuitry turns the device off if the IC temperature exceeds DSP, ASIC, and FPGA Point of Load Regulation +150C. ADSL, Broadband and Networking Applications Ordering Information Pinout ISL6442 PART (24 LD QSOP) NUMBER PART TEMP. PACKAGE PKG. TOP VIEW (Note) MARKING RANGE (C) (Pb-free) DWG. ISL6442IAZ* ISL 6442IAZ -40 to +85 24 Ld QSOP M24.15 OCSET1 1 24 VIN *Add -TK suffix for tape and reel. Please refer to TB347 for details SS1/EN1 2 23 BOOT1 on reel specifications. COMP1 3 22 UGATE1 NOTE: These Intersil Pb-free plastic packaged products employ FB1 4 21 PHASE1 special Pb-free material sets, molding compounds/die attach RT 5 20 LGATE1 materials, and 100% matte tin plate plus anneal (e3 termination SGND 6 19 VCC finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL LCDR 7 18 PGND classified at Pb-free peak reflow temperatures that meet or exceed LCFB 8 17 LGATE2 the Pb-free requirements of IPC/JEDEC J STD-020. FB2 9 16 PHASE2 COMP2 10 15 UGATE2 SS2/EN2 14 BOOT2 11 OCSET2 12 13 PGOOD FN9204 Rev 2.00 Page 1 of 17 Oct 31, 2008ISL6442 Block Diagram VCC VIN VCC REFERENCE POWER ON 5V LINEAR BIAS CURRENT RESET REGULATOR AND CONTROL 110A 30A 100A 0.6V OCSET1 VCC BOOT1 UVP1 OVP1 PG1 EN1 UGATE1 COMP1 OUTPUT1 DRIVERS PHASE1 GATE CONTROL LOGIC FB1 PWM1 VCC DEAD-TIME 0.6V CONTROL LGATE1 FAULT1 OVERCURRENT UVP1 OVP1 VCC5 VCC5 PGND PG1 EN1 RAMP1 30A 30A SS1 0 STARTUP 110A CLOCK AND OCSET2 SS1/EN1 SS1 EN1 SAWTOOTH GENERATOR VCC 1V DET BOOT2 SS2/EN2 SS2 EN2 UVP2 OVP2 PG2 FAULT2 UGATE2 EN2 RAMP2 180 UVP2 OUTPUT2 OVP2 DRIVERS PG2 PHASE2 EN2 GATE CONTROL PWM2 SS2 LOGIC VCC 0.6V DEAD-TIME CONTROL LGATE2 FB2 OVERCURRENT PGND COMP2 FAULT3 PG3 LCFB RT PG1 0.6V PG2 PGOOD PG3 LCFB LCDR SGND PGND FIGURE 1. BLOCK DIAGRAM FN9204 Rev 2.00 Page 2 of 17 Oct 31, 2008