DATASHEET ISL78236 FN8624 Rev.1.00 Dual 3A Current Sharing 2.5MHz High Efficiency Synchronous Buck Regulator Mar. 14, 2017 The ISL78236 is a dual output, 3A/3A, integrated FET buck Features regulator for point-of-load power applications. The supply Dual 3A/3A independent outputs voltage range is from 2.8V to 6V, allowing for the use of a single Li+ cell, three NiMH cells, or a regulated 3V/5V bus 2.5MHz synchronous buck regulator with internal MOSFETs input. It is optimized for regulating output voltages down to up to 95% efficiency 1.2V. Each channel provides an output current up to 3A, which 2% voltage reference accuracy over-temperature can be combined to form a single 6A output in current sharing 6A current sharing mode operation mode. The two channels operate 180 out of phase to reduce input RMS current and EMI. Internal or external compensation The ISL78236 integrates a pair of low ON-resistance P-channel Peak current limiting and hiccup mode short circuit and N-channel internal MOSFETs to maximize efficiency and protection minimize external component count. It can operate up to Reverse overcurrent protection 100% duty cycle to maximize operating life as battery voltage Over-temperature protection shutdown drops out. When supplying 3A on each channel, the 100% duty cycle operation limits the dropout voltage to less than 250mV. AEC-Q100 qualified Other features include internal digital soft-start, independent channel enable for power sequencing, overcurrent protection, Applications and thermal shutdown. DSP and embedded processor power supply The ISL78236 is offered in a 24 Ld 4mmx4mm QFN package Infotainment system power with 1mm maximum height. The complete converter occupies 2 Automotive point-of-load power less than 1.5cm area. The ISL78236 is AEC - Q100 qualified and is rated for the Related Literature automotive temperature range (-40C to +105C). For a full list of related documents, visit our website - ISL78236 product page 100 2.5V OUT 90 1.2V/3A 3V INPUT LX1 FPGA OR DSP 80 POWER EN1 1.2V OUT 1.5V OUT PG1 1.8V ISL78236 70 OUT EN2 1.5V/3A PG2 LX2 60 ASIC POWER 50 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT LOAD (A) FIGURE 1. TYPICAL APPLICATION BLOCK DIAGRAM: DUAL OUTPUT FIGURE 2. EFFICIENCY vs LOAD CURRENT, V = 3.3V, T = +25C IN A 3A/3A BUCK REGULATOR FN8624 Rev.1.00 Page 1 of 24 Mar. 14, 2017 EFFICIENCY (%)ISL78236 Table of Contents Typical Applications . 3 Block Diagram 5 Pin Configuration 6 Pin Descriptions . 6 Ordering Information 7 Absolute Maximum Ratings 8 Thermal Information . 8 Recommended Operating Conditions 8 Electrical Specifications 8 Typical Operating Performance for Dual PWM Operation . 10 Typical Performance for Current Sharing PWM Operation 15 Theory of Operation . 18 PWM Control Scheme 18 Synchronization Control 18 Output Current Sharing . 18 Overcurrent Protection . 18 Power-Good (PG) 19 UVLO 19 Enable . 19 Soft Start-Up 19 Discharge Mode (Soft-Stop) . 19 Power MOSFETs . 19 100% Duty Cycle 19 Thermal Shutdown 19 Applications Information 19 Output Inductor and Capacitor Selection 19 Output Voltage Selection . 20 Minimum Output Voltage . 20 Input Capacitor Selection . 20 Loop Compensation Design . 20 PCB Layout Recommendation . 21 Thermal Performance 22 Revision History 23 About Intersil 23 Package Outline Drawing 24 FN8624 Rev.1.00 Page 2 of 24 Mar. 14, 2017