USERS MANUAL ISL8120EVAL3Z AN1528 Rev.2.00 Evaluation Board Setup Procedure July 1, 2016 Description Recommended Equipment The ISL8120 integrates two voltage mode synchronous buck 0V to 22V power supply with at least 20A source current PWM controllers. It can be used either for dual independent capability, battery, or notebook AC adapter. outputs or a 2-phase single output regulator. Two electronic loads capable of sinking current up to 30A The ISL8120EVAL3Z evaluation board is for performance Digital Multimeters (DMMs). demo of the dual independent outputs and DDR applications. 100MHz quad-trace oscilloscope. The ISL8120EVAL4Z evaluation board is used for performance demo of 2/n-phase single-output applications. Refer to References application note AN1607 ISL8120EVAL4Z Evaluation Board ISL8120 Datasheet Setup Procedure for details of the ISL8120EVAL4Z board. AN1607, ISL8120EVAL4Z Evaluation Board Setup Procedure Preset Specifications VIN FREQUENCY Ordering Information (V) (kHz) V V OUT1 OUT2 PART NUMBER DESCRIPTION 12 500 1.2V/25A 1.2V/25A ISL8120EVAL3Z ISL8120 evaluation board for performance evaluation FIGURE 1. ISL8120EVAL3Z EVALUATION BOARD AN1528 Rev.2.00 Page 1 of 11 July 1, 2016ISL8120EVAL3Z 3. Verify that the two output voltages are correct. If the PGOOD Circuits Description is set high, the LED3 will be green. If the PGOOD is set low, the J1 and J2 are the input power terminals. LED3 will be red. TP24 is the test post to monitor PGOOD. Two input electrolytic capacitors are used to handle the input Evaluating the Other Output current ripples. Voltage Two upper and two lower Renesas speed series LFPAK and Q are footprint MOSFETs are used for each channel. Q The ISL8120EVAL3Z kit outputs are preset to 1.2V/25A, V 1 2 OUT1 options for low current applications where a SO8 package can also be adjusted between 0.6V to 3V by changing the value integrating dual MOSFET can be used. and R for V as given by Equation 1. The same rule of R 119 116 OUT1 applies for V . OUT2 320nH PULSE surface mount inductors are used for each channel. Under the 500kHz setup, the inductor current R 119 peak-to-peak ripple is 7.5A at 12V input. R ------------------------------------------------- Where V = 0.6V (EQ. 1) = REF 116 V V 1 OUT REF Two SANYO POSCAP 2R5TPF470M7L (7m) are used as output E-caps for each channel. Also, through-hole electrolytic capacitor r Sense Configuration DS(ON) footprints C ~ C are available for the user to evaluate 123 126 If the desired output voltage is higher than 3V, the current sense different output capacitors. has to be configured as r sensing because of the DS(ON) J7, J8, J9 and J10 are output lugs for load connections. common-mode voltage limitation of the current sense differential amplifier. The default setup of ISL8120EVAL3Z is TP19, TP26, TP28 and TP31 are remote sense posts. These pins DCR sensing. The following steps show how to change to r DS(ON) can be used to monitor and evaluate the system voltage sensing for Channel 2: regulations. If the user wants to use these test posts for remote sense, the R , R , R and R need to be changed to 1. Remove R and R to be open. 109 120 155 161 102 96 higher values, such as 10. Also, the related voltage sense 2. Change R and R to be 0 . divider needs to be increased to a higher resistance, such as 1k. 107 95 3. Short jumper JP7. Q , Q , R , R , R , R , R and R are circuit 26 27 126 156 122 131 151 153 footprint options to add an on-board transient load to the regulator. Use a signal generator to apply a clock signal at TP22 Programming the Input Voltage (TP30) to generate step-up and step-down transient load. Make UVLO and its Hysteresis sure that the duty cycle of the clock is small enough to avoid burning load resistors R and R . By programming the voltage divider at the EN/FF pin connected 126 156 to the input rail, the input UVLO and its hysteresis can be JP11 or JP12 are the jumpers used to disable the channels programmed. The ISL8120EVAL3Z has R (R ) 13.7k and 129 136 independently. R (R ) 4.42k the IC will be disabled when input voltage 135 141 drops below 3.38V and will restart until V recovers to be above TP27 is a post that can be used to inject a clock signal for the IN 4.42V. controller to be synchronized with. For 12V applications, it is suggested to have R (R ) 33k and sensing configuring. Also, JP7 and JP8 are jumpers for r 129 136 DS(ON) R (R ) 5.1k, of which the IC is disabled when the input these jumpers can be used to monitor the DCR sensing capacitor 135 141 voltage drops below 6V and will restart until V recovers to be voltage. IN above 7V. , C , R and C are optional footprints for snubbers, R 94 74 163 108 Refer to the ISL8120 datasheet to program the UVLO falling which are used to filter the ringing at phase nodes. threshold and hysteresis. The equations are restated in R , R , R , R , R , LED4 and Q are useless footprints. 99 100 125 130 132 32 Equations 2 and 3, where R and R are the upper and UP DOWN lower resistors of the voltage divider at EN/FF pin. V is the and C are small added filters for the VIN pin. R is used R HYS 121 86 145 desired UVLO hysteresis and V is the desired UVLO falling to isolate the noise at PVCC caused by driving. In 3.3V FTH threshold. applications, R and R are recommended to short to 0 to 121 145 prevent VCC from going below POR under low input voltage. Also, V (EQ. 2) HYS --------------- R = Where I = 30A it is recommended to add a 2k resistor from LGATE to GND to HYS UP I HYS discharge the low gate at the state of LGATE OFF. R V UP EN REF (EQ. 3) ----------------------------------------------- R = Where V = 0.8V Quick Start EN REF DOWN V V FTH EN REF 1. Ensure that the circuit is correctly connected to the supply and Note that the ISL8120 EN/FF pin is a triple function pin and the loads prior to applying any power. voltages applied to the EN/FF pins are also fed to adjust the 2. Adjust the input supply to be 12V. Turn on the input power amplitude of each channels individual sawtooth. supply. AN1528 Rev.2.00 Page 2 of 11 July 1, 2016