ISL98002 Data Sheet March 26, 2008 FN6535.0 Triple Video Digitizer with Digital PLL Features The ISL98002 3-Channel, 8-bit Analog Front End (AFE) 140MSPS and 170MSPS maximum conversion rates contains all the functions necessary to digitize analog YPbPr Glitchless Macrovision-compliant sync separator video signals and RGB graphics signals from DVD players, Extremely fast recovery from VCR head switching digital VCRs, video set-top boxes, and personal computers. This product familys conversion rates support HDTV Low PLL clock jitter (250ps peak-to-peak 170MSPS) resolutions up to 1080p and PC monitor resolutions up to 64 interpixel sampling positions UXGA, while the front end s programmable input bandwidth ensures sharp, clear images at all resolutions. to 1.4V video input range 0.35V P-P P-P To maximize performance with the widest variety of video Programmable bandwidth (100MHz to 780MHz) sources, the ISL98002 features a fast-responding digital PLL RGB 4:4:4 and YUV 4:2:2 output formats (DPLL), providing extremely low jitter with PC graphics signals Low power (535mW 170MSPS) and quick recovery from VCR head switching with video signals. Integrated HSYNC and SOG processing eliminate the Small 10mmx10mm 72 Ld QFN package need for external slicers, sync separators, Schmitt triggers, Completely independent 8-bit gain/10-bit offset control and filters. Pb-free (RoHS Compliant) Glitchless, automatic Macrovision- compliance is obtained by a digital Macrovision detection function that detects and Applications automatically removes Macrovision from the HSYNC signal. Digital TVs Projectors Ease of use is also emphasized with features such as the elimination of PLL charge pump current/VCO range Multifunction Monitors programming and single-bit switching between RGB and Digital KVM YPbPr signals. Automatic Black Level Compensation (ABLC) eliminates part-to-part offset variation, ensuring RGB Graphics Processing perfect black level performance in every application. Simplified Block Diagram OFFSET ABLC DAC VOLTAGE CLAMP 8 3 8-BIT ADC RGB/YPBPR PGA RGB/YUV IN + OUT X3 HSYNC OUT VSYNC OUT SOG IN HS OUT HSYNC SYNC PROCESSING DIGITAL PLL IN PIXELCLK OUT VSYNC IN AFE CONFIGURATION AND CONTROL CAUTION: These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners.ISL98002 Ordering Information PART NUMBER PART MAXIMUM PACKAGE PKG. (Note) MARKING PIXEL RATE TEMP RANGE (C) (Pb-free) DWG. ISL98002CRZ-140 ISL98002CRZ -140 140MHz 0C to +70C 72 Ld QFN L72.10x10B ISL98002CRZ-170 ISL98002CRZ -170 170MHz 0C to +70C 72 Ld QFN L72.10x10B NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD- 020. Block Diagram V CLAMP 10 OFFSET ABLC V DAC CLAMP Offset 10 ABLC DAC R 1 IN V + IN 8 R 7:0 R 1 IN 8 V + IN PGA 8-BIT ADC + 8 V - IN R 7:0 P 8 R 2 IN 8 bit ADC PGA + V - IN R 2 IN V CLAMP 10 V OFFSET ABLC CLAMP Offset 10 DAC ABLC DAC G 1 IN V + IN 8 GIN1 V + G 7:0 IN 8 8 G 7:0 P 8-BIT ADC PGA + 8 V - IN PGA 8 bit ADC + G 2 V - IN IN G 2 IN V CLAMP V CLAMP 10 Offset 10 OFFSET ABLC ABLC DAC DAC B 1 B 1 IN IN V + V + IN IN 8 8 B 7B :0 7:0 P 8 8 8 bit ADC8-BIT ADC PGPGAA + + V - IN V - IN B 2 IN B 2 IN DATACLK DATACLK SOG 1 IN DATACLK SOG 1 IN DATACLK SOG 2 IN SOG 2 IN HSYNC 1 Sync IN AFE Configuration HS HSYNC 1 OUT IN SYNC AFE CONFIGURATION AND Processing HS and Control OUT PROCESSING CONTROL VSYNC 1 IN VSYNC 1 IN HSYNC OUT HSYNC VSYNC OUT OUT CLOCKINV VSYNC OUT CLOCKINV Digital PLL XTAL IN XCLK OUT DIGITAL PLL XTAL OUT XTAL IN XCLK OUT XTAL OUT SCL Serial SDA SCL Interface SADDR SERIAL SDA INTERFACE SADDR FN6535.0 2 March 26, 2008 Output Data Formatter OUTPUT DATA FORMATTER