Datasheet RL78/G1C R01DS0348EJ0120 Rev.1.20 RENESAS MCU Sep 30, 2016 Integrated USB Controller, True Low Power Platform (as low as 112.5 A/MHz, and 0.61 A for RTC + LVD), 2.4 V to 5.5 V Operation, 32 Kbyte Flash, 31 DMIPS at 24 MHz, for All USB Based Applications 1. OUTLINE 1.1 Features Ultra-Low Power Technology Direct Memory Access (DMA) Controller 2.4 V to 5.5 V operation from a single supply Up to 2 fully programmable channels Stop (RAM retained): 0.23 A, (LVD enabled): 0.31 A Transfer unit: 8- or 16-bit Halt (RTC + LVD): 0.57 A Multiple Communication Interfaces Supports snooze 2 Up to 2 x I C master Operating: 71 A/MHz 2 Up to 1 x I C multi-master 16-bit RL78 CPU Core Up to 2 x CSI (7-, 8-bit) Delivers 31 DMIPS at maximum operating frequency Up to 1 x UART (7-, 8-, 9-bit) of 24 MHz Extended-Function Timers Instruction Execution: 86% of instructions can be executed in 1 to 2 clock cycles Multi-function 16-bit timer TAU: Up to 4 channels CISC Architecture (Harvard) with 3-stage pipeline (remote control output available) Multiply Signed & Unsigned: 16 x 16 to 32-bit result in Real-time clock (RTC): 1 channel (full calendar and 1 clock cycle alarm function with watch correction function) MAC: 16 x 16 to 32-bit result in 2 clock cycles 12-bit interval timer: 1 channel 16-bit barrel shifter for shift & rotate in 1 clock cycle 15 kHz watchdog timer: 1 channel (window function) 1-wire on-chip debug function Rich Analog Code Flash Memory ADC: Up to 9 channels, 8/10-bit resolution, 2.1 s Density: 32 KB minimum conversion time Block size: 1 KB Internal voltage reference (1.45 V) On-chip single voltage flash memory with protection On-chip temperature sensor from block erase/writing Self-programming with secure boot swap function Safety Features (IEC or UL 60730 compliance) and flash shield window function Flash memory CRC calculation RAM parity error check Data Flash Memory RAM write protection Data Flash with background operation SFR write protection Data flash size: 2 KB Illegal memory access detection Erase Cycles: 1 Million (typ.) Clock stop/frequency detection Erase/programming voltage: 2.4 V to 5.5 V ADC self-test RAM I/O port read back function (echo) 5.5 KB size options Supports operands or instructions General Purpose I/O Back-up retention in all modes 5 V tolerant, high-current (up to 20 mA per pin) Open-Drain, Internal Pull-up support High-speed On-chip Oscillator 24 MHz with +/ 1% accuracy over voltage (2.4 V to Operating Ambient Temperature 5.5 V) and temperature (20C to +85C) Standard: 40C to + 85C Pre-configured settings: 48 MHz, 24 MHz (TYP.) Extended: 40C to + 105C Reset and Supply Management Package Type and Pin Count Power-on reset (POR) monitor/generator 32-pin plastic HWQFN (5 x 5) Low voltage detection (LVD) with 9 setting options 32-pin plastic LQFP (7 x 7) (Interrupt and/or reset function) 48-pin plastic LFQFP (7 x 7) USB 48-pin plastic HWQFN (7 x 7) Complying with USB version 2.0, incorporating host/function controller Note To use the Apple Inc. battery charging mode, you must Corresponding to full-speed transfer (12 Mbps) and join in Apple s Made for iPod/iPhone/iPad (MFi) low-speed (1.5 Mbps) licensing program. Before requesting this specification Complying with Battery Charging Specification from Renesas Electronics, please join in the Apple s Revision 1.2 MFi licensing program. Compliant with the 2.1A/1.0A charging mode prescribed in the Apple Inc. MFi specification in the Note USB power supply component specification R01DS0348EJ0120 Rev.1.20 Page 1 of 134 Sep 30, 2016 RL78/G1C 1. OUTLINE ROM, RAM capacities Flash ROM Data flash RAM RL78/G1C 32-pin 48-pin Note 32 KB 2 KB 5.5 KB R5F10JBC, R5F10KBC R5F10JGC, R5F10KGC Note This is about 4.5 KB when the self-programming function is used. Remark The functions mounted depend on the product. See 1.6 Outline of Functions. 1.2 List of Part Numbers Pin count Package USB Function Fields of Part Number Note Application 32 pins 32-pin plastic HWQFN Host/Function controller A R5F10JBCANA U0, R5F10JBCANA W0 (5 5 , 0.5 mm pitch) G R5F10JBCGNA U0, R5F10JBCGNA W0 Function controller only A R5F10KBCANA U0, R5F10KBCANA W0 G R5F10KBCGNA U0, R5F10KBCGNA W0 32-pin plastic LQFP Host/Function controller A R5F10JBCAFP V0, R5F10JBCAFP X0 (7 7 , 0.8 mm pitch) G R5F10JBCGFP V0, R5F10JBCGFP X0 Function controller only A R5F10KBCAFP V0, R5F10KBCAFP X0 G R5F10KBCGFP V0, R5F10KBCGFP X0 48 pins 48-pin plastic LFQFP Host/Function controller A R5F10JGCAFB V0, R5F10JGCAFB X0 (7 7 , 0.5 mm pitch) G R5F10JGCGFB V0, R5F10JGCGFB X0 Function controller only A R5F10KGCAFB V0, R5F10KGCAFB X0s G R5F10JGCANA U0, R5F10JGCANA W0 48-pin plastic HWQFN Host/Function controller A R5F10JGCANA U0, R5F10JGCANA W0 (7 7 , 0.5 mm pitch) G R5F10JGCGNA U0, R5F10JGCGNA W0 Function controller only A R5F10KGCANA U0, R5F10KGCANA W0 G R5F10KGCGNA U0, R5F10KGCGNA W0 Note For the fields of application, refer to Figure 1-1 Part Number, Memory Size, and Package of RL78/G1C. Caution The part number above is valid as of when this manual was issued. For the latest part number, see the web page of the target product on the Renesas Electronics website. R01DS0348EJ0120 Rev.1.20 Page 2 of 134 Sep 30, 2016