GS9060 HD-LINX II SD-SDI and DVB-ASI Deserializer with Loop-Through Cable Driver GS9060 Data Sheet Key Features received solution can be realized for SD-SDI and DVB-ASI applications. SMPTE 259M-C compliant descrambling and NRZI NRZ decoding (with bypass) In addition to reclocking an deserializing the input data stream, the GS9060 performs NRZI-to-NRZ decoding, DVB-ASI sync word detection and 8b/10b decoding descrambling as per SMPTE 259M-C, and word serial loop-through cable driver output selectable as alignment when operating in SMPTE mode. When reclocked or non-reclocked operating in DVB-ASI mode, the device will word align dual serial digital input buffers with 2 x 1 mux the data to K28.5 sync characters and 8b/10b decode the received stream. integrated serial digital signal termination Two serial digital input buffers are provided with a 2x1 integrated reclocker multiplexer to allow the device to select from one of two descrambler bypass option serial digital input signals. adjustable loop bandwidth The integrated reclocker features a very wide Input user selectable additional processing features Jitter Tolerance of 0.3 UI (total 0.6 UI), a rapid including: asynchronous lock time, and full compliance with TRS, ANC data checksum and EDH CRC error DVB-ASI data streams. detection and correction An integrated cable driver is provided for serial input programmable ANC data detection loop-through applications and can be selected to output either buffered or reclocked data. This cable driver also illegal code remapping features an output mute on loss of signal, high internal flywheel for noise immune H, V, F impedance mode, adjustable signal swing. extraction The GS9060 also includes a range of data processing FIFO load Pulse functions such as error detection and correction, 20-bit / 10-bit CMOS parallel output data bus automatic standards detection, and EDH support. The device can also detect and extract SMTPTE 352M 27MHz / 13.5MHz parallel digital output payload identifier packets and independently identify automatic standards detection and indication the received video standard. This information is read Pb-free and RoHS compliant from internal registers via the host interface port. 1.8V core power supply and 3.3V charge pump TRS errors, EDH CRC errors and ancillary data power supply checksum errors can all be detected. A single DATA ERROR pin is provided which is a logical 3.3V digital I/O supply ORing of all detectable errors. Individual error status is JTAG test interface stored in internal ERROR STATUS registers. small footprint compatible with GS1560A, GS1561, Finally the device can correct detected errors and insert GS1532, and GS9062 new TRS ID words, ancillary data checksum words, and EDH CRC words. Illegal code re-mapping is also Applications available. All processing functions may be individually SMPTE 259M-C Serial Digital Interfaces enabled or disabled via the host interface control. DVB-ASI Serial Digital Interfaces The GS9060 is Pb-free, and the encapsulation compound does not contain halogenated flame Description retardant (RoHS compliant). The GS9060 is a reclocking deserializer with a serial loop-through cable driver. When used in conjunction *For new designs use GO1555 with any Gennum cable equalizer and the GO1555/GO1525* Voltage Controlled Oscillator, a 22208 - 8 January 2007 1 of 61 www.gennum.com20bit/10bit IOPROC EN/DIS FW EN/DIS JTAG/HOST F V CS TMS SCLK TCK H SDIN TDI SDOUT TDO smpte sync det DVB ASI asi sync det SMPTE BYPASS RESET TRST LOCKED PCLK RC BYP CP CAP VCO VCO LB CONT LF VCO VCC VCO GND IP SEL GS9060 Data Sheet Functional Block Diagram CD1 carrier detect CD2 rclk ctrl LOCK detect pll lock TERM 1 SMPTE De- DDI 1 scramble, Word DATA ERROR DDI 1 alignment and flywheel Reclocker S->P TRS correct DOUT 19:0 TERM 2 TRS check CSUM correct CSUM check DDI 2 K28.5 sync EDH check & I/O ANC data FIFO LD detect, DVB-ASI correct Buffer DDI 2 detection Illegal code re- word alignment map & mux and 8b/10b decode (o/p mute) rclk bypass pll lock CANC YANC SDO EN/DIS SDO SDO HOST Interface / JTAG Reset test RSET GS9060 Functional Block Diagram 22208 - 8 January 2007 2 of 61