SLG46117V-SKT Silego

SLG46117 GreenPAK Programmable Mixed-signal Matrix with P-FET Power Switch with Discharge General Description Pin Configuration The SLG46117 GreenPAK combines the functionality and ver- satility of a GreenPAK Programmable Mixed-signal Matrix with the capabilities of Silegos CuFET technology. Capable of in- tegrating a number common discrete ICs and passive compo- nents into a single device, the GreenPAK familys SLG46117V enables high power switching with a soft-start 1.25 A P-Ch 14 13 12 MOSFET with slew rate control and integrated discharge re- 1 11 GPI GPIO sistor. 2 10 GPIO GPIO Features 3 9 GND GPIO Logic & Mixed Signal Circuits Highly Versatile Macrocells 8 4 GND PWR SW ON Read Back Protection (Read Lock) 56 7 1.8V (5%) to 5V (10%) Supply Operating Temperature Range -40 C to 85 C Soft-Start 1.25 A P-FET Power Switch with discharge Package 1.6 x 2.5 x 0.55 mm STQFN 14L package 14-pin STQFN Pb-Free / Halogen-Free / RoHS compliant (Top View) Applications Power Sequencing with complex analog control Power Plane component size reduction project LED Driver Haptic Motor Driver System RESET with Power Switch Block Diagram Pin 14 Pin 12 Pin 13 VDD GPIO GPIO Pin 1 Pin 11 Counters/Delay Generators Look Up Tables (LUTs) GPI GPIO ACMP0 CNT0 CNT1 CNT3 2-bit 2-bit LUT2 2 LUT2 3 3-bit 3-bit Pin 2 Pin 10 LUT3 2 LUT3 3 GPIO GPIO Additional Logic Functions ACMP1 FILTER 0 Combination Function Macrocells Pin 3 Pin 9 2-bit 2-bit 4-bit GPIO GND LUT2 0 LUT2 1 LUT4 0 or DFF0 or DFF1 or CNT2 Programmable RC Oscillator Delay 3-bit 3bit 3-bit LUT3 4 or LUT3 0 LUT3 1 Pin 4 Pin 8 P-FET Pipe Delay or DFF2 or DFF3 Vref PWR SW GND Power Switch Pin 5 Pin 7 Pin 6 VIN NC VOUT Silego Technology, Inc. Rev 1.09 000-0046117-109 Revised October 10, 2017 VDD VIN GPIO NC GPIO VOUTSLG46117 1.0 Overview The SLG46117 provides a small, low power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one time Non-Volatile Memory (NVM) to configure the interconnect logic, the I/O Pins and the macrocells of the SLG46117. This highly versatile device allows a wide variety of mixed-signal functions to be designed within a very small, low power single integrated circuit. The SLG46117 includes the following: Two Analog Comparators (ACMP) Voltage References (Vref) Four Combinatorial Look Up Tables (LUTs) Two 2-bit LUTs Two 3-bit LUTs Seven Combination Function Macrocell Two Selectable DFF/Latch or 2-bit LUTs Two Selectable DFF/Latch or 3-bit LUTs One Selectable Pipe Delay or 3-bit LUT Pipe Delay 8 stage / 2 output One Selectable Counter/Delay or 4-bit LUT One Programmable Delay/ Deglitch Filter Three Counter / Delay Generators (CNT/DLY) Three 8-bit counter/delays with external clock/reset Four D Flip-Flop / Latches (DFF) (Part of Combination Function Macrocell) Pipe Delay 8 stage/2 output (Part of Combination Function Macrocell) Trimmed RC Oscillator (RC OSC) Power On Reset (POR) One Bandgap Soft-Start P-FET Power Switch Power Switch IDS: 1.25 A Slew Rate Control VIN: 1.5 V to 5.5 V Integrated Discharge Resistor Low RDSON 28.5 m 5.0 V 36.4 m 3.3 V 44.3 m 2.5 V 60.8 m 1.8 V 77.6 m 1.5 V 000-0046117-109 Page 1 of 87