CY28409 CY28409 Clock Synthesizer with Differential SRC and CPU Outputs Three differential CPU clock pairs Features One differential SRC clock Supports Intel Pentium 4-type CPUs 2 I C support with readback capabilities Selectable CPU frequencies Ideal Lexmark Spread Spectrum profile for maximum 3.3V power supply EMI reduction Ten copies of PCI clocks 56-pin SSOP and TSSOP packages Five copies of 3V66 with one optional VCH CPU SRC 3V66 PCI REF 48M Two copies 48 MHz USB clocks x 3 x 1 x 5 x 10 x 2 x 2 1 Block Diagram Pin Configuration VDD REF REF 0 1 56 FS B XIN XTAL REF0:1 REF 1 2 55 VDD A XOUT OSC PLL Ref Freq VDD REF 3 54 VSS A VDD CPU XIN 4 53 VSS IREF CPUT 0:2 , CPUC 0:2 CPU STP Divider PLL1 XOUT 5 52 IREF Network PCI STP VDD SRC VSS REF 6 51 FS A SRCT, SRCC PCIF0 7 50 CPU STP FS A:B VTT PWRGD PCIF1 8 49 PCI STP PCIF2 9 48 VDD CPU IREF VDD PCI 10 47 CPUT2 VDD 3V66 VSS PCI 11 46 CPUC2 3V66 0:3 PCI0 12 45 VSS CPU PCI1 13 44 CPUT1 VDD PCI PLL2 PCI2 14 43 CPUC1 PCIF 0:2 2 PCI3 15 42 VDD CPU PCI 0:6 VDD PCI 16 41 CPUT0 VSS PCI 17 40 CPUC0 PCI4 18 39 VSS SRC 3V66 4/VCH PCI5 19 38 SRCT PCI6 20 37 SRCC VDD 48MHz PD 21 36 VDD SRC PD DOT 48 3V66 0 22 35 VTT PWRGD USB 48 3V66 1 23 34 VDD 48 VDD 3V66 24 33 VSS 48 VSS 3V66 25 32 DOT 48 3V66 2 26 31 USB 48 2 SDATA I C 3V66 3 27 30 SDATA SCLK Logic SCLK 28 29 3V66 4/VCH 56 SSOP/TSSOP Note: 1. Signals marked with * and ** have internal pull-up and pull-down resistors, respectively.......................Document : 38-07445 Rev. *D Page 1 of 16 400 West Cesar Chavez, Austin, TX 78701 1+(512) 416-8500 1+(512) 416-9669 www.silabs.com ~ CY28409 Pin Description Pin No. Name Type Description 1, 2 REF(0:1) O, SE Reference Clock. 3.3V 14.318-MHz clock output. 4XIN I Crystal Connection or External Reference Frequency Input. This pin has dual functions. It can be used as an external 14.318-MHz crystal connection or as an external reference frequency input. 5 XOUT O, SE Crystal Connection. Connection for an external 14.318-MHz crystal output. 41,44,47 CPUT(0:2) O, DIF CPU Clock Output. Differential CPU clock outputs. See Table 1 for frequency config- uration. 40,43,46 CPUC(0:2) O, DIF CPU Clock Output. Differential CPU clock outputs. See Table 1 for frequency config- uration. 38, 37 SRCT, SRCC O, DIF Differential serial reference clock. 22,23,26,27 3V66(0:3) O, SE 66-MHz Clock Output. 3.3V 66-MHz clock from internal VCO. 29 3V66 4VCH O, SE 48-/66-MHz Clock Output. 3.3V selectable through SMBus to be 66 or 48 MHz. 7,8,9 PCIF(0:2) O, SE Free-running PCI Output. 33-MHz clocks divided down from 3V66. 12,13,14, PCI(0:6) O, SE PCI Clock Output. 33-MHz clocks divided down from 3V66. 15,18,19,20 31, USB 48 O, SE Fixed 48-MHz clock output. 32 DOT 48 O, SE Fixed 48-MHz clock output. 51,56 FS A, FS B I 3.3V LVTTL input for CPU frequency selection. 52 IREF I Current Reference. A precision resistor is attached to this pin which is connected to the internal current reference. 21 PD I, PU 3.3V LVTTL input for Power-Down active LOW. 50 CPU STP I, PU 3.3V LVTTL input for CPU STP active LOW. 49 PCI STP I, PU 3.3V LVTTL input for PCI STP active LOW. 35 VTT PWRGD I 3.3V LVTTL input is a level sensitive strobe used to latch the FS A and FS B inputs (active LOW). 30 SDATA I/O SMBus-compatible SDATA. 28 SCLK I SMBus-compatible SCLOCK. 53 VSS IREF GND Ground for current reference. 55 VDD A PWR 3.3V power supply for PLL. 54 VSS A GND Ground for PLL. 42,48 VDD CPU PWR 3.3V power supply for outputs. 45 VSS CPU GND Ground for outputs. 36 VDD SRC PWR 3.3V power supply for outputs. 39 VSS SRC GND Ground for outputs. 34 VDD 48 PWR 3.3V power supply for outputs. 33 VSS 48 GND Ground for outputs. 10,16 VDD PCI PWR 3.3V power supply for outputs. 11,17 VSS PCI GND Ground for outputs. 24 VDD 3V66 PWR 3.3V power supply for outputs. 25 VSS 3V66 GND Ground for outputs. 3 VDD REF PWR 3.3V power supply for outputs. 6 VSS REF GND Ground for outputs.......................Document : 38-07445 Rev. *D Page 2 of 16