Si21692-D60 Dual DVB-T2/S2/S2X/T/C/S Digital TV Demodulator Description Features The Si21692D integrates two separate high-performance digital - Pin-to-pin compatible with all dual demodulator family: Si216x2 demodulators for the DVB-T2/T/C, DVB-S2/S and DVB-S2X and Si218x2 - API compatible with all single and all dual demodulators standards into a single compact package. Leveraging Skyworks - DVB-T2 and T2-Lite (ETSI EN 302 755-V1.4.1) proven digital demodulation architecture, the Si21692D achieves - Bandwidth: 1.7, 5, 6, 7 or 8 MHz excellent reception performance for each media while significantly - NorDig Unified 2.5 and D-Book 8 compliant minimizing front-end design complexity, cost, and power - DVB-T (ETSI EN 300 744) dissipation. Connecting the Si21692D to both a dual - NorDig Unified 2.5, D-Book 8 compliant terrestrial/cable TV tuner, and a dual satellite tuner, results in a - DVB-C (ETSI EN 300 429) / ITU-T J.83 Annex A/B/C high-performance and cost optimized TV front-end solution. - 1 to 7.2 MSymbol/s, C-Book compliant Skyworks internally-developed DVB-T2 (including T2-Lite) - DVB-S2 (ETSI EN 302 307-1 V1.4.1) demodulators support all modes specified by the DVB-T2 standard - QPSK/8PSK demodulator (V1.4.1). Main features of the DVB-T2 mode are, SISO and MISO - DVB-S2X (ETSI EN302 307-2 V1.1.1) support, FEF management, fully autonomous signal acquisition - QPSK/8PSK, 8/16/32APSK demodulator including automatic L1 signaling parsing support for all pilot - Roll-off factors from 0.05 to 0.35 patterns, and DVB-T2/T auto-detection. - Channel bonding for TS transmission supported The DVB-T and DVB-C, including ITU-T J.83 annex B, - DVB-S (ETSI EN 300 421) and DSS supported demodulators are enhanced versions of proven and broadly used - Dual DiSEqC 2.x interface, Unicable support Si2164/67/68/69 Skyworks devices. - 1 to 45 MSps for all satellite standards The satellite reception allows demodulating widespread DVB-S, (<40 MSps in 32APSK) DIRECTV (DSS), DVB-S2, DIRECTV (AMC) legacy 2 - I C serial bus interfaces (master and host) standards, and new Part II of DVB-S2 (S2X) satellite broadcast 2 - Upgradeable with firmware patch download via fast SPI or I C standard. A zero-IF interface (differential) allows for a seamless (broadcast mode supported) connection to market proven satellite silicon tuners. It also - Dual independent differential IF input for T/C tuners and differ- integrates two DiSEqC 2.0 LNB interfaces for satellite dish ential ZIF I/Q inputs for satellite tuners control and, for each satellite demodulator, an equalizer to - GPIOs and multi-purpose ports (two per demodulator) compensate for echoes in long cable feeds from the LNB to the - Separate flexible TS interfaces with serial or parallel satellite tuner RF input. outputs and cross-bar feature The Si21692D offers an on-chip blind scanning algorithm for DVB- - Fast lock times for all standards S/S2/S2X and DVB-C standards, as well as blind lock function. - Only two power supplies: 1.2 and 3.3 V The Si21692D embeds two independent programmable transport - 8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant stream interfaces which provide a flexible range of output modes, Applications including a cross-bar functionality, and are fully compatible with all - Multi-receiver iDTV: on-board or in a NIM MPEG decoders or conditional access modules to support any - Advanced multimedia PVR STBs customer application. - PC-TV accessories - PVR, DVD, and Blu-Ray disc recorders 1.2, 3.3V RESETB MP A A MP C A Si21692D S ADC IP A ADC A S ADC IN A TS1 SYNC S ADC QP A Dual Satellite TS1 DATA S ADC QN A ADC A DEMODULATOR A CORE Tuner 8 TS1 VAL TS A TC ADC P A TS1 CLK ADC A TC ADC N A DiSEqC OUT A GPIO1/ I2C Block A DiSEqC A TS ERR A DiSEqC CMD DiSEqC IN A B ADDR A SDA MAST SDA HOST SCL MAST SCL HOST XO XTAL I/CLK IN ADDR B CLK IN/OUT TV Tuner DiSEqC OUT B GPIO0/ DiSEqC B I2C Block B TS ERR B TC ADC P B TV Tuner ADC B TS2 SYNC TC ADC N B TS B TS2 DATA S ADC IP B 8 TS2 VAL DEMODULATOR B CORE ADC B S ADC IN B TS2 CLK S ADC QP B S ADC QN B ADC B MP B B MP D B Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 22, 2021 HDTV MPEG S.o.C.Si21692-D60 Dual DVB-T2/S2/S2X/T/C/S Digital TV Demodulator Table 1. Selected Electrical Specifications (T = 10 to 70 C). A Parameter Test Condition Min Typ Max Unit General Input clock reference 4 30 MHz Supported XTAL frequency 16 30 MHz 1 Total power consumption for DVB-T2 356 mW each demodulator 2 DVB-T 182 mW 3 DVB-C 142 mW 4 DVB-S2 421 mW 5 DVB-S 230 mW Thermal resistance ( ) 4 layer PCB 42 C/W JA Power Supplies V 1.14 1.20 1.30 V DD VCORE V 3.00 3.30 3.60 V DD VANA V 3.00 3.30 3.60 V DD VIO Notes: 1. Test conditions: 8 MHz, 256-QAM, 32K FFT, CR = 3/5, GI = 1/128, PP7, C/N at picture failure, parallel TS. 2. Test conditions: 8 MHz, 8K FFT, 64-QAM, parallel TS. 3. Test conditions: 6.9 Mbaud, 256-QAM, parallel TS. 4. Test conditions: 32 Mbaud, CR = 3/5, 8PSK, pilots On, C/N at picture failure, parallel TS. 4 5. Test conditions: 30 Mbaud, CR = 7/8, at QEF: BER = 2 x 10 , parallel TS. Pin Assignments 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 S ADC IN A 52 34 TS1 DATA 5 S ADC QP A 53 33 VDD VIO S ADC QN A 54 32 GND S ADC IP B 55 31 VDD CORE S ADC IN B 56 30 VDD CORE S ADC QP B TS2 DATA 4 57 29 Si21692D S ADC QN B TS1 DATA 4 58 28 TC ADC P A 59 27 TS2 DATA 3 (GND PAD) TC ADC N A 60 26 TS1 DATA 3 TC ADC P B 61 25 TS2 DATA 2 QFN-68 TC ADC N B 62 24 TS1 DATA 2 CLK IN OUT 63 8x8mm 23 TS2 DATA 1 SDA MAST 64 22 TS1 DATA 1 SCL MAST 65 21 TS2 DATA 0 /TS2 SER GND TS1 DATA 0 /TS1 SER 66 20 VDD CORE TS2 CLK 67 19 VDD CORE 68 18 TS1 CLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 Table 1. Selection Guide Part Description Si21692-D60-GM/R Dual Digital TV Demodulator for DVB-T2/S2/S2X/T/C/S, 8x8 mm QFN-68 Skyworks Solutions, Inc. Phone 781 376-3000 Fax 781 376-3100 sales skyworksinc.com www.skyworksinc.com Skyworks Proprietary Information Products and Product Information are Subject to Change Without Notice August 22, 2021 MP A A S ADC IP A MP B B VDD ANA GPIO 0/TS ERR B ADDR B DISEQC CMD A ADDR A DISEQC IN A B XTAL I/CLK IN DISEQC OUT A XO DISEQC OUT B RESETB VDD CORE MP D B VDD CORE MP C A GND VDD CORE VDD VIO VDD CORE SCL HOST GPIO 1/TS ERR A SDA HOST TS2 DATA 7 TS1 VAL TS1 DATA 7 TS2 VAL TS2 DATA 6 TS1 SYNC TS1 DATA 6 TS2 SYNC TS2 DATA 5