SI3010-FS Silicon Labs

Si3056 Si3018/19/10 GLOBAL SERIAL INTERFACE DIRECT ACCESS ARRANGEMENT Features Complete DAA includes the following: Programmable line interface Pulse dialing support AC termination Overload detection DC termination 3.3 V power supply Ring detect threshold Direct interface to DSPs Ringer impedance Serial interface control for up to eight 80 dB dynamic range TX/RX paths devices Integrated codec and 2- to 4-wire >5000 V isolation hybrid Proprietary isolation technology Integrated ring detector Parallel handset detection Ordering Information Type I and II caller ID support +3.2 dBm TX/RX level mode See page 88. Line voltage monitor Programmable digital hybrid for near- Loop current monitor end echo reduction Polarity reversal detection Low-profile SOIC packages Programmable digital gain Lead-free/RoHS-compliant packages Pin Assignments Clock generation available Si3056 Applications 1 MCLK 16 OFHK FSYNC 2 15 RGDT/FSD/M1 V.92 modems Set-top boxes Internet appliances SCLK 3 14 M0 Voice mail systems Fax machines Personal digital V 4 13 V D A Multi-function printers assistants 12 GND SDO 5 SDI 6 11 AOUT/INT Description FC/RGDT 7 10 C1A RESET 8 9 C2A The Si3056 is an integrated direct access arrangement (DAA) with a programmable line interface to meet global telephone line requirements. Available in two 16-pin small outline packages, it eliminates the need for an analog front end Si3018/19/10 (AFE), isolation transformer, relays, opto-isolators, and a 2- to 4-wire hybrid. The Si3056 dramatically reduces the number of discrete components and cost 1 16 DCT2 QE required to achieve compliance with global regulatory requirements. The Si3056 2 15 IGND DCT interfaces directly to standard modem DSPs. 3 14 DCT3 RX IB 4 13 QB Functional Block Diagram C1B 5 12 QE2 C2B 6 11 SC Si3056 Si3018/19/10 VREG 7 10 VREG2 8 9 RNG1 RNG2 MCLK RX SCLK IB FSYNC Digital SC SDI Interface US Patent 5,870,046 Hybrid and SDO dc DCT US Patent 6,061,009 FC/RGDT Termination VREG VREG2 Other Patents Pending Isolation Isolation DCT2 Interface Interface DCT3 RGDT/FSD/M1 RNG1 OFHK Control RNG2 M0 Interface Ring Detect QB Off-Hook RESET QE QE2 AOUT/INT Rev. 1.05 6/05 Copyright 2005 by Silicon Laboratories Si3056Si3056 Si3018/19/10 2 Rev. 1.05