Si5345 Si5344 Si5342 Si5345/44/42 Rev D Data Sheet 10-Channel, Any-Frequency, Any-Output Jitter Attenuator/ KEY FEATURES Clock Multiplier Generates any combination of output These jitter attenuating clock multipliers combine fourth-generation DSPLL and frequencies from any input frequency MultiSynth technologies to enable any-frequency clock generation and jitter attenu- Ultra-low jitter of 90 fs rms ation for applications requiring the highest level of jitter performance. These devices External Crystal: 25 to 54 MHz are programmable via a serial interface with in-circuit programmable non-volatile Input frequency range memory (NVM) so they always power up with a known frequency configuration. They Differential: 8 kHz to 750 MHz support free-run, synchronous, and holdover modes of operation, and offer both au- tomatic and manual input clock switching. The loop filter is fully integrated on-chip, LVCMOS: 8 kHz to 250 MHz eliminating the risk of noise coupling associated with discrete solutions. Furthermore, Output frequency range the jitter attenuation bandwidth is digitally programmable, providing jitter perform- Differential: 100 Hz to 1028 MHz ance optimization at the application level. Programming the Si5345/44/42 is easy LVCMOS: 100 Hz to 250 MHz with Silicon Labs ClockBuilder Pro software. Factory preprogrammed devices are Meets G.8262 EEC Option 1, 2 (SyncE) also available. Highly configurable outputs compatible with LVDS, LVPECL, LVCMOS, CML, and HCSL with programmable signal amplitude Applications: Si5345: 4 input, 10 output, 64-QFN 99 mm OTN muxponders and transponders Si5344: 4 input, 4 output, 44-QFN 77 mm 10/40/100 G networking line cards Si5342: 4 input, 2 output, 44-QFN 77 mm GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262) Carrier Ethernet switches SONET/SDH line cards Broadcast video Test and measurement ITU-T G.8262 (SyncE) compliant 25-54 MHz XTAL XA XB OSC MultiSynth INT OUT0 MultiSynth INT OUT1 FRAC IN0 MultiSynth INT OUT2 IN1 FRAC DSPLL MultiSynth INT 4 Input OUT3 Up to 10 Clocks IN2 FRAC MultiSynth INT OUT4 Output Clocks INT OUT5 IN3/FB IN FRAC INT OUT6 INT OUT7 INT OUT8 Status Flags Status Monitor INT OUT9 I2C / SPI Control NVM silabs.com Building a more connected world. Rev. 1.2 Si5345/44/42 Rev D Data Sheet Features List 1. Features List The Si5345/44/42 Rev D features are listed below: Generates any combination of output frequencies from any in- Optional zero delay mode put frequency Fastlock feature for low nominal bandwidths Ultra-low jitter of 90 fs rms Glitchless on the fly output frequency changes Input frequency range DCO mode: as low as 0.001 ppb step size Differential: 8 kHz750 MHz Core voltage LVCMOS: 8 kHz250 MHz V : 1.8 V 5% DD Output frequency range V : 3.3 V 5% DDA Differential: 100 Hz to 1028 MHz Independent output clock supply pins LVCMOS: 100 Hz to 250 MHz 3.3 V, 2.5 V, or 1.8 V Programmable jitter attenuation bandwidth: 0.1 Hz to 4 kHz 2 Serial interface: I C or SPI Meets G.8262 EEC Option 1, 2 (SyncE) In-circuit programmable with non-volatile OTP memory Highly configurable outputs compatible with LVDS, LVPECL, ClockBuilder Pro software simplifies device configuration LVCMOS, CML, and HCSL with programmable signal ampli- Si5345: 4 input, 10 output, 64-QFN 99 mm tude Si5344: 4 input, 4 output, 44-QFN 77 mm Status monitoring (LOS, OOF, LOL) Si5342: 4 input, 2 output, 44-QFN 77 mm Hitless input clock switching: automatic or manual Temperature range: 40 to +85 C Locks to gapped clock inputs Pb-free, RoHS-6 compliant Free-run and holdover modes silabs.com Building a more connected world. Rev. 1.2 2