S34MS01G2 S34MS02G2 S34MS04G2 1Gb, 2 Gb, 4 Gb, 1.8 V, 4-bit ECC, SLC NAND Flash Memory for Embedded Distinctive Characteristics Density Device size: 1 Gb: 1 plane per device or 128 MB 1 Gb / 2 Gb / 4 Gb 2 Gb: 2 planes per device or 256 MB Architecture 4 Gb: 2 planes per device or 512 MB Input / Output Bus Width: 8 bits / 16 bits NAND flash interface Page size: x8 Open NAND Flash Interface (ONFI) 1.0 compliant 1 Gb: (2048 + 64) bytes 64-byte spare area Address, Data, and Commands multiplexed 2 Gb / 4 Gb: (2048 + 128) bytes 128-byte spare area Supply voltage x16 1.8 V device: V = 1.7 V ~ 1.95 V CC 1 Gb: (1024 + 32) words 32-word spare area Security 2 Gb / 4Gb: (1024 + 64) words 64-word spare area One Time Programmable (OTP) area Block size: 64 Pages Serial number (unique ID) (Contact factory for support) x8 Hardware program/erase disabled during power transition 1 Gb: 128 KB + 4 KB Additional features 2 Gb / 4 Gb: 128 KB + 8 KB 2 Gb and 4 Gb parts support Multiplane Program and Erase x16 commands 1 Gb: (64k + 2k) words Supports Copy Back Program 2 Gb / 4 Gb: (64k + 4k) words 2 Gb and 4 Gb parts support Multiplane Copy Back Program Plane size: Supports Read Cache x8 Electronic signature 1 Gb: 1024 Blocks per Plane or (128 MB + 4 MB) 2 Gb: 1024 Blocks per Plane or (128 MB + 8 MB) Manufacturer ID: 01h 4 Gb: 2048 Blocks per Plane or (256 MB + 16 MB) Operating temperature x16 Industrial: 40 C to 85 C 1 Gb: 1024 Blocks per Plane or (64M + 2M) words Industrial Plus: 40 C to 105 C 2 Gb: 1024 blocks per plane or (64M + 4M) words 4 Gb: 2048 blocks per plane or (128M + 8M) words Performance Page Read / Program Reliability Random access: 25 s (Max) (S34MS01G2) 100,000 Program / Erase cycles (Typ) (with 4-bit ECC per 528 bytes (x8) or 264 words (x16)) Random access: 30 s (Max) (S34MS02G2, S34ML04G2) 10-year Data retention (Typ) Sequential access: 45 ns (Min) For one plane structure (1-Gb density) Program time / Multiplane Program time: 300 s (Typ) Block zero is valid and will be valid for at least 1,000 pro- Block Erase (S34MS01G2) gram-erase cycles with ECC Block Erase time: 3.0 ms (Typ) For two plane structures (2-Gb and 4-Gb densities) Block Erase / Multiplane Erase (S34MS02G2, S34MS04G2) Blocks zero and one are valid and will be valid for at least Block Erase time: 3.5 ms (Typ) 1,000 program-erase cycles with ECC Package options Pb-free and Low Halogen 48-Pin TSOP 12 20 1.2 mm 63-Ball BGA 9 11 1 mm 67-Ball BGA 8 6.5 1 mm (S34MS01G2, S34MS02G2) SkyHigh Memory Limited Suite 4401-02, 44/F One Island East, www.skyhighmemory.com Document Number: 002-03238 Rev. *G 18 Westlands Road Hong Kong Revised May 03, 2019S34MS01G2 S34MS02G2 S34MS04G2 Contents 1. General Description...................................................... 3 5.3 AC Test Conditions ........................................ 35 5.4 AC Characteristics.......................................... 36 1.1 Logic Diagram .................................................. 4 5.5 DC Characteristics.......................................... 37 1.2 Connection Diagram......................................... 5 5.6 Pin Capacitance ............................................. 38 1.3 Pin Description ................................................. 7 5.7 Program / Erase Characteristics..................... 38 1.4 Block Diagram .................................................. 8 1.5 Array Organization............................................ 9 6. Timing Diagrams......................................................... 39 1.6 Addressing...................................................... 11 6.1 Command Latch Cycle ................................... 39 1.6.1 S34MS01G211 6.2 Address Latch Cycle ...................................... 40 1.6.2 S34MS02G212 6.3 Data Input Cycle Timing ................................. 40 1.6.3 S34MS04G213 6.4 Data Output Cycle Timing (CLE=L, WE =H, 1.7 Mode Selection............................................... 14 ALE=L, WP =H)............................................. 41 2. Bus Operation ............................................................. 15 6.5 Data Output Cycle Timing (EDO Type, CLE=L, WE =H, ALE=L)............................................. 41 2.1 Command Input.............................................. 15 6.6 Page Read Operation..................................... 42 2.2 Address Input ................................................. 15 6.7 Page Read Operation (Interrupted by CE ) ... 42 2.3 Data Input....................................................... 15 6.8 Page Read Operation Timing with CE Dont 2.4 Data Output .................................................... 15 Care................................................................ 43 2.5 Write Protect................................................... 15 6.9 Page Program Operation ............................... 43 2.6 Standby .......................................................... 15 6.10 Page Program Operation Timing with CE Dont 3. Command Set.............................................................. 16 Care................................................................ 44 3.1 Page Read...................................................... 17 6.11 Page Program Operation with Random Data In- 3.2 Page Program ................................................ 17 put .................................................................. 44 3.3 Multiplane Program S34MS02G2 and 6.12 Random Data Output In a Page ..................... 45 S34MS04G2................................................... 18 6.13 Multiplane Page Program Operation 3.4 Page Reprogram ............................................ 18 S34MS02G2 and S34MS04G2 ...................... 45 3.5 Block Erase .................................................... 20 6.14 Block Erase Operation ................................... 46 3.6 Multiplane Block Erase S34MS02G2 and 6.15 Multiplane Block Erase S34MS02G2 and S34MS04G2................................................... 20 S34MS04G2................................................... 47 3.7 Copy Back Program ....................................... 21 6.16 Copy Back Read with Optional Data Readout 48 3.7.1 Multiplane Copy Back Program 6.17 Copy Back Program Operation With Random S34MS02G2 and S34MS04G221 Data Input....................................................... 48 3.7.2 Special Read for Copy Back S34MS02G2 6.18 Multiplane Copy Back Program S34MS02G2 and S34MS04G221 and S34MS04G2............................................ 49 3.8 Read Status Register ..................................... 22 6.19 Read Status Register Timing.......................... 50 3.9 Read Status Enhanced S34MS02G2 and 6.20 Read Status Enhanced Timing....................... 51 S34MS04G2................................................... 22 6.21 Reset Operation Timing ................................. 51 3.10 Read Status Register Field Definition............. 22 6.22 Read Cache ................................................... 52 3.11 Reset .............................................................. 23 6.23 Cache Program .............................................. 54 3.12 Read Cache.................................................... 23 6.24 Multiplane Cache Program S34MS02G2 and 3.13 Cache Program .............................................. 24 S34MS04G2................................................... 55 3.14 Multiplane Cache Program S34MS02G2 and 6.25 Read ID Operation Timing.............................. 57 S34MS04G2................................................... 25 6.26 Read ID2 Operation Timing............................ 57 3.15 Read ID .......................................................... 26 6.27 Read ONFI Signature Timing ......................... 58 3.16 Read ID2 ........................................................ 28 6.28 Read Parameter Page Timing........................ 58 3.17 Read ONFI Signature..................................... 28 6.29 Read Unique ID Timing (Contact Factory) ..... 59 3.18 Read Parameter Page.................................... 28 6.30 OTP Entry Timing........................................... 59 3.19 Read Unique ID (Contact Factory) ................. 31 6.31 Power On and Data Protection Timing........... 60 3.20 One-Time Programmable (OTP) Entry........... 32 6.32 WP Handling ................................................ 61 4. Signal Descriptions .................................................... 33 7. Physical Interface ....................................................... 62 4.1 Data Protection and Power On / Off Sequence... 7.1 Physical Diagram ........................................... 62 33 7.1.1 48-Pin Thin Small Outline Package (TSOP1) 4.2 Ready/Busy .................................................... 33 62 4.3 Write Protect Operation.................................. 34 7.1.2 63-Ball, Ball Grid Array (BGA)63 5. Electrical Characteristics........................................... 35 7.1.3 67-Ball, Ball Grid Array (BGA) (S34MS01G2, 5.1 Valid Blocks.................................................... 35 S34MS02G2)64 5.2 Absolute Maximum Ratings............................ 35 Document Number: 002-03238 Rev. *G Page 2 of 73