Low Power, 8.5 mW, 2.3 V to 5.5 V, Programmable Waveform Generator Data Sheet AD9837 FEATURES GENERAL DESCRIPTION Digitally programmable frequency and phase The AD9837 is a low power, programmable waveform generator 8.5 mW power consumption at 2.3 V capable of producing sine, triangular, and square wave outputs. MCLK speed: 16 MHz (B grade), 5 MHz (A grade) Waveform generation is required in various types of sensing, 28-bit resolution: 0.06 Hz at 16 MHz reference clock actuation, and time domain reflectometry (TDR) applications. Sinusoidal, triangular, and square wave outputs The output frequency and phase are software programmable, 2.3 V to 5.5 V power supply allowing easy tuning. The frequency registers are 28 bits wide: 3-wire SPI interface with a 16 MHz clock rate, resolution of 0.06 Hz can be achieved Extended temperature range: 40C to +125C with a 5 MHz clock rate, the AD9837 can be tuned to 0.02 Hz Power-down option resolution. 10-lead LFCSP The AD9837 is written to via a 3-wire serial interface. This serial interface operates at clock rates up to 40 MHz and is compatible APPLICATIONS with DSP and microcontroller standards. The device operates Frequency stimulus/waveform generation with a power supply from 2.3 V to 5.5 V. Liquid and gas flow measurement Sensory applications: proximity, motion, The AD9837 has a power-down (sleep) function. Sections of the and defect detection device that are not being used can be powered down to minimize Line loss/attenuation the current consumption of the part. For example, the DAC can Test and medical equipment be powered down when a clock output is being generated. Sweep/clock generators The AD9837 is available in a 10-lead LFCSP WD package. Time domain reflectometry (TDR) applications FUNCTIONAL BLOCK DIAGRAM AGND DGND VDD CAP/2.5V ON-BOARD REGULATOR MCLK REFERENCE AVDD/ FULL-SCALE COMP DVDD CONTROL 2.5V 28-BIT FREQ0 REG 12 PHASE SIN 10-BIT DAC MUX ACCUMULATOR MUX ROM (28-BIT) 28-BIT FREQ1 REG MSB 12-BIT PHASE0 REG MUX 12-BIT PHASE1 REG DIVIDE VOUT MUX BY 2 16-BIT CONTROL REGISTER R 200 SERIAL INTERFACE AND CONTROL LOGIC AD9837 FSYNC SCLK SDATA Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112012 Analog Devices, Inc. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09070-001AD9837 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Functional Description .................................................................. 13 Applications ....................................................................................... 1 Serial Interface ............................................................................ 13 General Description ......................................................................... 1 Latency Period ............................................................................ 13 Functional Block Diagram .............................................................. 1 Control Register ......................................................................... 13 Revision History ............................................................................... 2 Frequency and Phase Registers ................................................ 15 Specifications ..................................................................................... 3 Reset Function ............................................................................ 16 Timing Characteristics ................................................................ 4 Sleep Function ............................................................................ 16 Absolute Maximum Ratings ............................................................ 5 VOUT Pin ................................................................................... 16 Thermal Resistance ...................................................................... 5 Powering Up the AD9837 ......................................................... 16 ESD Caution .................................................................................. 5 Applications Information .............................................................. 19 Pin Configuration and Function Descriptions ............................. 6 Grounding and Layout .............................................................. 19 Typical Performance Characteristics ............................................. 7 Interfacing to Microprocessors................................................. 19 Test Circuit ........................................................................................ 9 Evaluation Board ............................................................................ 21 Terminology .................................................................................... 10 System Demonstration Platform .............................................. 21 Theory of Operation ...................................................................... 11 AD9837 to SPORT Interface ..................................................... 21 Circuit Description ......................................................................... 12 Evaluation Kit ............................................................................. 21 Numerically Controlled Oscillator Plus Phase Modulator ... 12 Crystal Oscillator vs. External Clock ....................................... 21 SIN ROM ..................................................................................... 12 Power Supply ............................................................................... 21 Digital-to-Analog Converter (DAC) ....................................... 12 Evaluation Board Schematics ................................................... 22 Regulator ...................................................................................... 12 Evaluation Board Layout ........................................................... 24 Outline Dimensions ....................................................................... 25 Ordering Guide .......................................................................... 25 REVISION HISTORY 12/12Rev. 0 to Rev. A Changed Input Current, IINH/IINL from 10 mA to 10 A .............. 3 Updated Outline Dimensions ....................................................... 25 4/11Revision 0: Initial Version Rev. A Page 2 of 28