EVSTGAP2SICSN STMicroelectronics

EVSTGAP2SICSN Data brief Demonstration board for STGAP2SICSN isolated 4 A single gate driver Features Board Half bridge configuration, high voltage rail up to 520 V SCT35N65: 650 V, 55 m SiC MOSFET Negative gate driving On-board isolated DC-DC converters to supply high-side and low-side gate drivers, fed by VAUX = 5 V, with 5.2 kV maximum isolation 3.3 V VDD logic supply generated on-board or 5 V (externally applied) Easy jumper selection of driving voltage configuration: +17/0 V +17/-3 V +19/0 V +19/-3 V Device Driver current capability: 4 A source/sink 25 C Separate sink and source output for easy gate driving configuration Short propagation delay: 75 ns UVLO function Gate driving voltage up to 26 V 3.3 V, 5 V TTL/CMOS inputs with hysteresis Temperature shutdown protection Standby function Description Product status link The EVSTGAP2SICSN is a half-bridge evaluation board designed to evaluate the STGAP2SICSN isolated single gate driver. EVSTGAP2SICSN The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making the device suitable also for high power inverter applications such as motor drivers in industrial applications equipped with SiC power switch. The separated source and sink outputs allow to independently optimize turn-on and turn-off by using dedicated gate resistors. The device integrates protection functions: UVLO and thermal shutdown are included to easily design high reliability systems. Dual input pins allow choosing the control signal polarity and implementing HW interlocking protection to avoid cross- conduction in case of controller s malfunction. The device allows implementing negative gate driving, and the on-board isolated DC-DC converters allow working with optimized driving voltage for SiC. The EVSTGAP2SICSN board allows evaluating all the STGAP2SICSN features while driving a half-bridge power stage with voltage rating up to 520 V. It is possible to increase bus voltage by replacing the power switches with appropriate devices in H2PACK-7L or H2PACK-2L package and the C29 capacitance if needed. The board components are easy to access and modify to make driver performance evaluation easier under different application conditions and fine adjustment of final application components. DB4526 - Rev 1 - August 2021 www.st.com For further information contact your local STMicroelectronics sales office.EVSTGAP2SICSN Schematic diagram 1 Schematic diagram Figure 1. EVSTGAP2SICSN circuit schematic gate drivers J1 1 C IN+H I N+ H TP1 2 C IN-H I N- H TP2 C IN+L I N+ L 3 TP3 4 C IN-L I N- L TP4 5 G ND TP5 6 VDD V DD TP6 7 VAUX V AUX TP7 CN1 TE 928814-1 1 HV 1 2 J2 VDD R1 12R 2 GH C IN+H 1 I N+ H 2 C IN-H I N- H HV 3 C IN+L I N+ L C1 D1 TP8 3 4 C IN-L I N- L 100nF/50V VDD STPS2L40ZFY 5 VH H C2 G ND U1 Q2 V DD 6 VDD 100nF/50V GH 1 Q2A R2 2R2 1 SCTH35N65G2V 7 VAUX N.M. V AUX 1 5 VAUX VDD VH VH H R3 100R JP1 C IN+H IN+H 2 6 GONUH IN+ GON 0R C4 2 C3 R4 100R C IN-H TP9 IN-H 3 7 GOFCH N.M. IN- GOFF 1uF 50V GND JP2 N.M. JP3 N.M. GNDISO H 4 8 GND GNDISO C5 C6 GNDISO H 220pF/25V 220pF/25V STGAP2SiCSN TP10 HS SK GNDISO H C7 1uF 50V R17 CN2 TE 928814-1 JP4 0R N.M. 1 C IN-L C IN+H OUT 1 2 2 JP5 0R VH L VH H D2 C IN+L C IN-H R5 OUT 2 1 TP11 JP6 N.M. N.M. STTH112A C IN-L C IN-H VDD 10-20R R6 12R GL C8 D3 3 100nF/50V STPS2L40ZFY VDD VH L C9 U2 Q1 100nF/50V R8 2R2 1 SCTH35N65G2V GL 1 Q1A VH L 1 5 N.M. VDD VH R7 100R JP7 C IN+L IN+L GONUL 2 6 0R C10 C11 IN+ GON 2 R9 100R CN3 TE 928814-1 C IN-L IN-L GOFCL 3 7 IN- GOFF 1uF 50V N.M. 1 JP8 N.M. JP9 N.M. 1 4 8 GNDISO L 2 GND GNDISO 2 GNDPWR C12 C13 GNDISO L STGAP2SiCSN TP12 LS SK 220pF/25V 220pF/25V GNDPWR GNDISO L C14 1uF 50V TP13 R18 N.M. Figure 2. EVSTGAP2SICSN circuit schematic supply, connectors and decoupling JP10 N.M. DCDCH+ VH H J3 2 3 TP14 N.M. R10 Q3 2 1K VH H 2STF1360 1 1 C15 GNDISO H FB1 JP11 0R 1uF/50V U3 BLM21AG471SN1 D4 7 C16 T1 N.M. +Vout D5 BZT585B18T 4.7uF/50V 1 R11 0R +Vin BZT585B20T VAUX 1 4 JP12 N.M. 6 HS SK 0V C17 2 3 2 C18 -Vin C19 5 N.M. 1uF/50V -Vout 1uF/50V D6 FB2 BZT585B2V7T BLM21AG471SN1 MGJ2D051509SC DCDCH- GNDISO H TP15 JP13 0R GNDISO H JP14 N.M. DCDCL+ VH L J4 2 3 TP16 N.M. R12 Q4 1 1K VH L 2STF1360 1 2 GNDISO L C20 JP15 0R FB3 1uF/50V U4 BLM21AG471SN1 D8 7 C21 D7 +Vout BZT585B18T T2 N.M. 1 4.7uF/50V R13 0R +Vin BZT585B20T VAUX 1 4 JP16 N.M. 6 LS SK 0V C22 2 3 2 C23 -Vin 5 C24 N.M. 1uF/50V -Vout 1uF/50V D9 FB4 BZT585B2V7T GNDISO L BLM21AG471SN1 MGJ2D051509SC DCDCL- TP17 GNDISO L JP17 0R VDD JP18 N.M. R14 VAUX HV 10M + R15 C25 C26 C27 C28 C29 R16 240R N.M. N.M. N.M. N.M. 33nF/1.25kV 10M Electr. SMD SMD Film Film P 15mm VAUX 5V - VDD 5V JP18 P 7.5/10 1812 1812 P 27.5 VAUX 5V - VDD 3.3V JP19-JP20-JP21 JP19 R19 VAUX 12V - VDD 5V JP20 680R 0R VAUX 12V - VDD 3.3V JP20-JP21 JP20 0R C30 10uF/25V D11 D10 MMSZ5V1T1G MMSZ3V3T1G C31 4.7uF/10V JP21 0R DB4526 - Rev 1 page 2/11 2 1 2 1 2 2 3 tab 3 tab 4 4 5 5 6 6 7 7 GNDPWR OUT OUT HV