HCF4541B PROGRAMMABLE TIMER 16 STAGE BINARY COUNTER LOW SYMMETR. OUTPUT RESISTANCE, TYPICALLY 100 at V = 15V DD OSCILLATOR FREQUENCY RANGE : DC to 100KHz AUTO OR MASTER RESET DISABLES DIP SOP OSCILLATOR DURING RESET TO REDUCE POWER DISSIPATION OPERATES WITH VERY SLOW CLOCK RISE AND FALL TIMES ORDER CODES BUILT-IN LOW-POWER RC OSCILLATOR PACKAGE TUBE T & R EXTERNAL CLOCK (applied to pin 3) CAN DIP HCF4541BEY BE USED INSTEAD OF OSCILLATOR n SOP HCF4541BM1 HCF4541M013TR OPERATES AS 2 FREQUENCY DIVIDER OR AS A SINGLE-TRANSITION TIMER DESCRIPTION Q/Q SELECT PROVIDES OUTPUT LOGIC The HCF4541B is a monolithic integrated circuit LEVEL FLEXIBILITY fabricated in Metal Oxide Semiconductor CAPABLE OF DRIVING SIX LOW POWER technology available in DIP and SOP packages. TTL LOADS, THREE LOW POWER This device is composed of a 16-stages binary SCHOTTKY LOADS, OR SIX HTL LOADS counter, an oscillator controlled by 2 external OVER THE RATED TEMP. RANGE resistors and a capacitor, an output control logic 5V, 10V AND 15V PARAMETRIC RATINGS and an automatic power-on reset circuit. The 100% TESTED FOR QUIESCENT CURRENT counter varies on positive-edge clock transition AT 20V and it can be cleared by the MASTER RESET MEETS ALL REQUIREMENTS OF JEDEC input. The output from this timer is the Q or Q JESD13B STANDARD SPECIFICATIONS output from the 8th, 13th, or 16th counter stage. FOR DESCRIPTION OF B SERIES CMOS The choice of the stage depends on the time DEVICE PIN CONNECTION September 2002 1/10HCF4541B select inputs A or B (see frequency selection0 and switching power on. If pin 5 is set to logic1 , the AUTO RESET circuit is not enabled and table). The output is available in one of the two modes that can be selected via the MODE input counting cannot start till a positive MASTER RESET pulse is applied, returning to a low level. pin 10 (see truth table). The output turns out as a The AUTO RESET consumes a remarkable continuos square wave, with a frequency equal to N amount of power and should not be used if low the oscillator frequency divided by 2 when this power operation is wanted. The frequency of the MODE input is a logic1 . When it is a logic0 oscillator depends on the RC network. It can be and after a MASTER RESET is started, and Q calculated using the following formula : output has been selected, the output goes up to a N-1 high state after 2 counts. It remains in that f = 1 / 2.3 R C TC TC state till another MASTER RESET pulse is apply or the mode input is a logic1 . The process starts where f is between 1KHz and 100KHz and RS > by setting the AUTO RESET input (pin 5) to logic 10 K and 2 R TC INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 12, 13 A, B Time Select Input 4, 11 NC Not Connected External Resistor, Capaci- R , C 1, 2 TC TC tor Connection External Resistor Con- R 3 nection or External Clock S Input 5 AR Auto Reset Input 6 MR Master Reset Input 10 MODE Mode Select Input Q/Q 9 Output Selector SELECT 8 Q Output V 7 Negative Supply Voltage SS V 14 Positive Supply Voltage DD RC OSCILLATOR CIRCUIT 2/10