L6561 POWER FACTOR CORRECTOR 1 FEATURES Figure 1. Packages VERY PRECISE ADJUSTABLE OUTPUT OVERVOLTAGE PROTECTION MICRO POWER START-UP CURRENT (50 A TYP.) SO-8 DIP-8 VERY LOW OPERATING SUPPLY Table 1. Order Codes CURRENT(4mA TYP.) INTERNAL START-UP TIMER Part Number Package CURRENT SENSE FILTER ON CHIP L6561 DIP-8 DISABLE FUNCTION L6561D SO-8 1% PRECISION ( T = 25C) INTERNAL j L6561D013TR Tape & Reel REFERENCE VOLTAGE TRANSITION MODE OPERATION Realised in mixed BCD technology, the chip gives TOTEM POLE OUTPUT CURRENT: 400mA the following benefits: DIP-8/SO-8 PACKAGES micro power start up current 1% precision internal reference voltage 2 DESCRIPTION (Tj = 25C) L6561 is the improved version of the L6560 stan- Soft Output Over Voltage Protection dard Power Factor Corrector. Fully compatible no need for external low pass filter on the cur- rent sense with the standard version, it has a superior perfor- very low operating quiescent current minimis- mant multiplier making the device capable of work- es power dissipation ing in wide input voltage range applications (from The totem pole output stage is capable of driving 85V to 265V) with an excellent THD. Furthermore a Power MOS or IGBT with source and sink cur- the start up current has been reduced at few tens rents of 400mA. The device is operating in tran- of mA and a disable function has been implement- sition mode and it is optimised for Electronic Lamp ed on the ZCD pin, guaranteeing lower current Ballast application, AC-DC adaptors and SMPS. consumption in stand by mode. Figure 2. Block Diagram COMP MULT CS 23 4 1 INV - 40K 2.5V MULTIPLIER + 5pF VOLTAGE OVER-VOLTAGE - + REGULATOR DETECTION V CC 8 V INTERNAL CC R Q SUPPLY 7V 20V R1 S 7 GD + UVLO DRIVER - R2 V REF2 ZERO CURRENT DETECTOR 2.1V + STARTER 1.6V - DISABLE 6 5 D97IN547E GND ZCD REV. 16 June 2004 1/13L6561 Table 2. Absolute Maximum Ratings Symbol Pin Parameter Value Unit I 8I + I (I = 0) 30 mA Vcc q Z GD I 7 Output Totem Pole Peak Current (2 s) 700 mA GD INV, COMP 1, 2, 3 Analog Inputs & Outputs -0.3 to 7 V MULT CS 4 Current Sense Input -0.3 to 7 V ZCD 5 Zero Current Detector 50 (source) mA -10 (sink) mA P Power Dissipation T = 50 C (DIP-8) 1 W tot amb (SO-8) 0.65 W T Junction Temperature Operating Range -40 to 150 C j T Storage Temperature -55 to 150 C stg Figure 3. Pin Connection (Top view) INV 1 8 V CC COMP 2 7 GD MULT 3 6 GND CS4Z5CD DIP8 Table 3. Thermal Data Symbol Parameter SO 8 MINIDIP Unit R Thermal Resistance Junction to ambient 150 100 C/W th j-amb Table 4. Pin Description N. Name Function 1 INV Inverting input of the error amplifier. A resistive divider is connected between the output regulated voltage and this point, to provide voltage feedback. 2 COMP Output of error amplifier. A feedback compensation network is placed between this pin and the INV pin. 3 MULT Input of the multiplier stage. A resistive divider connects to this pin the rectified mains. A voltage signal, proportional to the rectified mains, appears on this pin. 4 CS Input to the comparator of the control loop. The current is sensed by a resistor and the resulting voltage is applied to this pin. 5 ZCD Zero current detection input. If it is connected to GND, the device is disabled. 6 GND Current return for driver and control circuits. 7 GD Gate driver output. A push pull output stage is able to drive the Power MOS with peak current of 400mA (source and sink). 8V Supply voltage of driver and control circuits. CC (1) Parameter guaranteed by design, not tested in production. 2/13