LD49100 Datasheet Automotive-grade, 1 A, low quiescent current, low-noise regulator with soft-start Features AEC-Q100 qualified DFN6 (3x3) Temperature range: -40 C to 125 C Wettable Flanks Input voltage from 1.5 to 5.5 V Ultra low-dropout voltage (200 mV typ. at 1 A load) Very low quiescent current (20 A typ. at no load, 200 A typ. at 1 A load, 1 A max. in off mode) Very low-noise with no bypass capacitor (30 V at V = 0.8 V) RMS OUT Output voltage tolerance: 2.0% at 25 C 1 A guaranteed output current Wide range of output voltages available on request: 0.8 V to 4.5 V with 100 mV step and adjustable from 0.8 V Logic-controlled electronic shutdown Power Good function Stable with ceramic capacitors C = 1 F OUT Internal current and thermal limit DFN6 (3x3 mm) package with wettable flanks Applications Infotainment and cluster Maturity status link ADAS LD49100 Telematics Body electronics Description The LD49100 provides 1 A maximum current with an input voltage range from 1.5 V to 5.5 V and a typical dropout voltage of 200 mV. The device is stable with ceramic capacitors on the input and output. The ultra low-dropout voltage, low quiescent current and low-noise features make it suitable for a wide range of automotive applications. Power supply rejection is 70 dB at low frequency and starts to roll off at 10 kHz. Enable logic control function puts the LD49100 in shutdown mode, allowing a total current consumption lower than 1 A. The device features a precise Power Good indicator, useful to monitor and sequence functions. Internal 1 ms soft-start circuit allows the reduction of inrush current. The device includes the short-circuit constant current limiting and thermal protection. The LD49100 is available in AEC-Q100 grade 1 qualified version, in a small 6-pin DFN6 (3x3 mm) with wettable flank package. DS13115 - Rev 4 - February 2021 www.st.com For further information contact your local STMicroelectronics sales office.LD49100 Circuit schematics 1 Circuit schematics Figure 1. LD49100 schematic diagram (adjustable version) IN PG Power-good signal IIINNN BBaanndGdGaapp rreeffereerennccee CCuurrrreennt t OpOpAmAmpp lliimmiitt OUT TThheerrmmaall protection ADJ EN InIntteerrnnaall eennaabbllee GND Figure 2. LD49100 schematic diagram (fixed version) IN PG Power-good signal IN BBaanndGdGaapp rreeffereerennccee CCuurrrreennt t OpOpAmAmpp lliimmiitt OUT TThheerrmmaall pprrootteeccttiioonn R 1 V SENSE EN R 2 InIntteerrnnaall eennaabblele GND DS13115 - Rev 4 page 2/28