M41T00AUD Serial real-time clock (RTC) with audio Features Combination real-time clock with audio Serial real-time clock (RTC) based on M41T00 Audio section provides: 300 mW differential audio amplifier 256 and 512 Hz tone generation DFN16 (5 mm x 4 mm) 33 to +12 dB gain, 3 dB steps (16 steps plus MUTE) 0 C to 70 C operation Audio section Small DFN16 package (5 mm x 4 mm) Power amplifier Real-time clock details Differential output amplifier Provides 300 mW into 8 Superset of M41T00 (THD+N = 2% (max), f = 1 kHz) in 3.0 to 3.6 V operation Summing node at audio input Timekeeping down to 1.7 V Inverting configuration with summing Automatic backup switchover circuit resistors into the minus (-) terminal Ultra-low 400 nA backup current at 3.0 V 0 dB gain with 10 k feedback resistor and (typ) 20 k input summing resistors Suitable for battery or capacitor backup Signal input centered at V /2 DD On-chip trickle charge circuit for backup 1.6 V analog input range (max) P-P capacitor 256 or 512 Hz signal multiplexing with analog 2 400 kHz I C bus input to provide audio with beep tones M41T00 compatible register set with counters Volume control, 4-bit register for seconds, minutes, hours, day, date, month, Allows gain adjustment from 33 dB to years, and century +12 dB Automatic leap year compensation 3 dB steps HT bit set when clock goes into backup MUTE bit mode Audio automatically shuts off in backup mode RTC operates using 32,768 Hz quartz crystal Calibration register provides for adjustments of 63 to +126 ppm Oscillator supports crystals with up to 40 k series resistance, 12.5 pF load capacitance Oscillator fail detect circuit OF bit indicates when oscillator has stopped for four or more cycles February 2012 Doc ID 13480 Rev 5 1/42 www.st.com 1Contents M41T00AUD Contents 1 Description . 6 2 Pin settings 7 2.1 Pin connection 7 2.2 Pin description 7 3 Application . 8 4 Operation . 10 4.1 2-wire bus characteristics . 11 4.2 Characteristics . 13 4.3 READ mode . 13 4.4 WRITE mode 15 4.5 Data retention mode . 15 5 M41T00AUD clock operation . 16 5.1 Clock registers . 16 5.1.1 Halt bit operation 17 5.1.2 Oscillator fail detect operation 17 5.1.3 Trickle charger 17 5.2 Reading and writing the clock registers 18 5.3 Priority for IRQ/FT/OUT pin . 21 5.4 Switchover thresholds . 22 5.5 Trickle charge circuit . 23 6 Clock calibration . 24 6.1 Digital calibration (periodic counter correction) 24 7 Audio section operation . 28 7.1 Gain . 30 7.1.1 Gain tolerance 30 7.2 Wake-up time: T WU . 31 2/42 Doc ID 13480 Rev 5
