M41ST85WMX6TR STMicroelectronics

M41ST85W 2 3.0/3.3 V I C combination serial RTC, NVRAM supervisor and microprocessor supervisor Features SNAPHAT battery & crystal Automatic battery switchover and WRITE protect for: Internal serial RTC and External low power SRAM (LPSRAM) 2 28 400 kHz I C serial interface 1 3.0/3.3 V operating voltage SOH28 V = 2.7 to 3.6 V CC Embedded crystal Ultralow battery supply current of 500 nA (max) RoHS compliant Lead-free second level interconnect SOX28 Serial RTC features 2 400 kHz I C Power-on reset/low voltage detect 44 bytes of general purpose NVRAM Open drain reset output Counters for: Reset voltage, V = 2.60 V (nom) PFD Seconds, minutes, hours, day, date, month, Two reset input pins and year Watchdog can be steered to reset output Century Tenths/hundredths of seconds NVRAM supervisor features Clock calibration register allows Non-volatizes external LPSRAM compensation for crystal variations over Automatically switches to back-up battery temperature and deselects (write-protects) external Programmable alarm with repeat modes LPSRAM via chip-enable gate Functions in battery back-up mode Power-fail deselect (write protect) voltage, V = 2.60 V (nom) Power-down timestamp (HT bit) PFD Switchover, V = 2.50 V (nom) SO 2.5 to 5.5 V oscillator operating voltage Battery monitor (battery low flag) Microprocessor supervisor features Other features Programmable watchdog Programmable squarewave generator (1 Hz to 62.5 ms to 128 s time-out period 32 KHz) Early power-fail warning circuit (PFI/PFO) with 40C to +85C operation 1.25 V precision reference Package options: 28-lead SNAPHAT IC (SOH28) SNAPHAT battery/crystal top to be ordered separately 28-lead embedded crystal SOIC (SOX28) October 2011 Doc ID 7531 Rev 11 1/43 www.st.com 1Contents M41ST85W Contents 1 Description . 6 2 Operating modes . 12 2.1 2-wire bus characteristics . 12 2.1.1 Bus not busy . 13 2.1.2 Start data transfer . 13 2.1.3 Stop data transfer . 13 2.1.4 Data valid 13 2.1.5 Acknowledge . 13 2.2 Read mode 15 2.3 Write mode 17 2.4 Data retention mode . 17 3 Clock operation 19 3.1 Power-down time-stamp 19 3.2 TIMEKEEPER registers . 19 3.3 Calibrating the clock . 21 3.4 Setting alarm clock registers 23 3.5 Watchdog timer 24 3.6 Square wave output . 25 3.7 Power-on reset . 25 3.8 Reset inputs (RSTIN1 & RSTIN2) 26 3.9 Power-fail input/output . 26 3.10 Century bit 27 3.11 Output driver pin 27 3.12 Battery low warning . 27 3.13 t bit 28 rec 3.14 Initial power-on defaults 28 4 Maximum ratings . 29 5 DC and AC parameters 30 2/43 Doc ID 7531