M48T58Y-70PC1 STMicroelectronics

M48T58 M48T58Y 5.0 V, 64 Kbit (8 Kb x 8) TIMEKEEPER SRAM Features Integrated, ultra low power SRAM, real-time clock, power-fail control circuit and battery BYTEWIDE RAM-like clock access BCD coded year, month, day, date, hours, minutes, and seconds 28 Frequency test output for real-time clock 1 Automatic power-fail chip deselect and WRITE PCDIP28 protection Battery/crystal CAPHAT WRITE protect voltages (V = power-fail deselect voltage): PFD M48T58: V = 4.75 to 5.5 V CC 4.5 V V 4.75 V PFD SNAPHAT M48T58Y: V = 4.5 to 5.5 V CC Battery/crystal 4.2 V V 4.5 V PFD Self-contained battery and crystal in the CAPHAT DIP package Packaging includes a 28-lead SOIC and SNAPHAT top (to be ordered separately) SOIC package provides direct connection for a snaphat housing containing the battery and 28 crystal 1 Pin and function compatible with JEDEC SOH28 standard 8 Kb x 8 SRAMs RoHS compliant Lead-free second level interconnect June 2011 Doc ID 2412 Rev 8 1/33 www.st.com 1Contents M48T58, M48T58Y Contents 1 Description . 5 2 Operation modes 8 3 READ mode 9 4 WRITE mode 11 5 Data retention mode 14 6 Clock operations . 15 6.1 Reading the clock . 15 6.2 Setting the clock 15 6.3 Stopping and starting the oscillator . 15 6.4 Calibrating the clock . 16 6.5 Battery low flag . 19 6.6 Century bit 19 6.7 V noise and negative going transients . 20 CC 7 Maximum ratings . 21 8 DC and AC parameters 22 9 Package mechanical data 25 10 Part numbering 29 11 Environmental information . 31 12 Revision history . 32 2/33 Doc ID 2412 Rev 8