M74HC08RM13TR STMicroelectronics

M74HC08 Quad dual-input and gate Datasheet - production data Description The M74HC08 is a high-speed CMOS quad dual- 2 input and gate fabricated with silicon gate C MOS technology. SOP14 TSSOP14 The internal circuit is composed of two stages including a buffer output which enables high noise immunity and stable output. Features All inputs are equipped with protection circuits to guard against static discharge and transient High speed: t = 7 ns (typ.) at V = 6 V PD CC excess voltage. Low power dissipation: I = 1 A (max.) at CC T = 25 C A High noise immunity: V = V = 28 % V NIH NIL CC Table 1: Device summary (min.) Symmetrical output impedance: I = I = OH OL Order code Temperature Package Packaging Marking 4 mA (min) range Balanced propagation delays: t ~= t (1) PLH PHL M74HC08YRM13TR -40 C to SO14 Tape and 74HC08Y Wide operating voltage range: V (OPR) = CC +125 C (automotive reel 1 2 V to 6 V grade) Pin and function compatible with 74 series M74HC08RM13TR -55 C to SO14 Tape and 74HC08 08 +125 C reel ESD performance M74HC08TTR -55 C to TSSOP14 Tape and HC08 CDM: 1 kV +125 C reel HBM: 2 kV 1 MM: 200 V M74HC08YTTR -40 C to TSSOP14 Tape and HC08Y +125 C (automotive reel 1 grade) Notes: (1) Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 and Q002 or equivalent. October 2013 DocID001885 Rev 2 1/15 www.st.com This is information on a product in full production. Contents M74HC08 Contents 1 Pin information ................................................................................ 5 2 Functional description .................................................................... 6 3 Electrical characteristics ................................................................ 7 4 Package information ..................................................................... 11 4.1 SO14 package information .............................................................. 12 4.2 TSSOP14 package information ....................................................... 13 5 Revision history ............................................................................ 14 2/15 DocID001885 Rev 2