M74HC590RM13TR STMicroelectronics

M74HC590 8 BINARY COUNTER REGISTER WITH 3 STATE OUTPUT HIGH SPEED: f = 61 MHz (TYP.) at V = 6V MAX CC LOW POWER DISSIPATION: I = 4A(MAX.) at T =25C CC A HIGH NOISE IMMUNITY: V = V = 28 % V (MIN.) NIH NIL CC DIP SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: I = I = 6mA (MIN) for QA ~ QH OUTPUT OH OL I = I = 4mA (MIN) for RCO OUTPUT OH OL BALANCED PROPAGATION DELAYS: ORDER CODES t t PLH PHL PACKAGE TUBE T & R WIDE OPERATING VOLTAGE RANGE: DIP M74HC590B1R V (OPR) = 2V to 6V CC SOP M74HC590M1R M74HC590RM13TR PIN AND FUNCTION COMPATIBLE WITH TSSOP M74HC590TTR 74 SERIES 590 DESCRIPTION cascading, a ripple carry output RCO is provided. The M74HC590 is an high speed CMOS 8-BIT Expansion is easily accomplished by tying RCO of BINARY COUNTER REGISTER (3 STATE) the first stage to CCKEN of the second stage, etc. 2 fabricated with silicon gate C MOS technology. Both the counter and register clocks are positive This device contains an 8-bit binary counter that edge triggered. If the user wishes to connect both feeds an 8-bit storage register. The storage clocks together, the counter state will always be register has parallel outputs. Separate clocks are one count ahead of the register. Internal circuitry provided for both the binary counter and storage prevents clocking from the clock enable. All inputs register. The binary counter features a direct clear are equipped with protection circuits against static input CCLR and a count enable input CCKEN. For discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS August 2001 1/15 Obsolete Product(s) - Obsolete Product(s)M74HC590 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1, 2, 3, 4, 5, QA to QH Outputs 6, 7, 15 11 CCK Counter Clock Input 12 CCKEN Counter Clock Enable Input 13 RCK Register Clock Input 9RCO Ripple Carry Output 14 G Output Enable Input 10 CCLR Counter Clear Input 8 GND Ground (0V) 16 V Positive Supply Voltage CC TRUTH TABLE INPUTS OUTPUT G RCK CCLR CCKEN CCK H X X X X Q OUTPUTS DISABLE L X X X X Q OUTPUTS ENABLE X X X X COUNTER DATA IS STORED INTO REGISTER X X X X REGISTER STAGE IS NOT CHANGED X X L X X COUNTER CLEAR X X H L ADVANCE ONE COUNT X X H L NO COUNT X X H H X NO COUNT X: Dont Care RCO = QAQBQCQDQEQFQGQH (QA to QH : INTERNAL OUTPUTS OF THE COUNTER) LOGIC DIAGRAM 2/15 Obsolete Product(s) - Obsolete Product(s)