ST7262xxx Low speed USB 8-bit MCU with 3 endpoints, Flash or ROM memory, LVD, WDG, 10-bit ADC, 2 timers, SCI, SPI Features Memories 8 or 16 Kbyte Program memory (ROM or Dual voltage FLASH) with read-write protection SO20 PDIP20 In-Application and In-Circuit Programming for FLASH versions 384 to 768 bytes RAM (128-byte stack) Clock, Reset and Supply Management Enhanced Reset System (Power On Reset) Low Voltage Detector (LVD) SO34 shrink PDIP32 shrink Clock-out capability 6 or 12 MHz Oscillator (8, 4, 2, 1 MHz internal frequencies) 3 Power saving modes USB (Universal Serial Bus) Interface DMA for low speed applications compliant with USB specification (version 2.0): LQFP44 PDIP42 shrink Integrated 3.3V voltage regulator and trans- ceivers Analog Peripheral Suspend and Resume operations 10-bit A/D Converter with up to 8 input pins. 3 Endpoints 2 Communications Interfaces Up to 31 I/O Ports Asynchronous Serial Communication inter- Up to 31 multifunctional bidirectional I/O lines face Up to 12 External interrupts (3 vectors) Synchronous Serial Peripheral Interface 13 alternate function lines Instruction Set 8 high sink outputs 8-bit data manipulation (8 mA 0.4 V/20 mA 1.3 V) 63 basic instructions 2 true open drain pins (N buffer 8 mA 0.4 V) 17 main addressing modes 3 Timers 8 x 8 unsigned multiply instruction Configurable watchdog timer (8 to 500ms True bit manipulation timeout) Nested interrupts 8-bit Auto Reload Timer (ART) with 2 Input Development Tools Captures, 2 PWM outputs and External Clock 8-bit Time Base Unit (TBU) for generating pe- Full hardware/software development package riodic interrupts cascadable with ART Device Summary Features ST72623F2 ST72621K4 ST72622L2 ST72621L4 ST72621J4 Program memory - Kbytes 8 16 8 16 16 RAM (stack) - bytes 384 (128) 768 (128) 384 (128) 768 (128) 768 (128) Peripherals USB, Watchdog, Low Voltage Detector, 8-bit Auto-Reload timer, Timebase unit, A/D Converter Serial I/O - SPI + SCI SPI SPI + SCI I/Os 11 212331 Operating Supply 4.0V to 5.5V (Low voltage 3.0V to 5.5V ROM versions available) Operating Temperature 0C to +70C Packages PDIP20/SO20 PDIP32 SO34 PDIP42/LQFP44 June 2009 Doc ID 6996 Rev 5 1/139 1 Obsolete Product(s) - Obsolete Product(s)Table of Contents 1 INTRODUCTION 4 2 PIN DESCRIPTION 5 2.1 PCB LAYOUT RECOMMENDATION . 10 3 REGISTER & MEMORY MAP . 11 4 FLASH PROGRAM MEMORY 14 4.1 INTRODUCTION 14 4.2 MAIN FEATURES . 14 4.3 STRUCTURE . 14 4.4 ICC INTERFACE 15 4.5 ICP (IN-CIRCUIT PROGRAMMING) . 16 4.6 IAP (IN-APPLICATION PROGRAMMING) . 16 4.7 RELATED DOCUMENTATION . 16 4.8 REGISTER DESCRIPTION 16 5 CENTRAL PROCESSING UNIT . 17 5.1 INTRODUCTION 17 5.2 MAIN FEATURES . 17 5.3 CPU REGISTERS . 17 6 CLOCKS AND RESET 20 6.1 CLOCK SYSTEM 20 6.2 RESET 21 7 INTERRUPTS . 24 7.1 INTRODUCTION 24 7.2 MASKING AND PROCESSING FLOW . 24 7.3 INTERRUPTS AND LOW POWER MODES . 26 7.4 CONCURRENT & NESTED MANAGEMENT 26 7.5 INTERRUPT REGISTER DESCRIPTION . 27 8 POWER SAVING MODES . 30 8.1 INTRODUCTION 30 8.2 WAIT MODE . 30 8.3 HALT MODE . 31 9 I/O PORTS 32 9.1 INTRODUCTION 32 9.2 FUNCTIONAL DESCRIPTION 32 9.3 MISCELLANEOUS REGISTER . 40 10 ON-CHIP PERIPHERALS . 41 10.1 WATCHDOG TIMER (WDG) . 41 10.2 PWM AUTO-RELOAD TIMER (ART) . 43 10.3 TIMEBASE UNIT (TBU) . 53 10.4 SERIAL PERIPHERAL INTERFACE (SPI) 56 10.5 SERIAL COMMUNICATIONS INTERFACE (SCI) . 67 139 10.6 USB INTERFACE (USB) 83 2/139 Doc ID 6996 Rev 5 1 Obsolete Product(s) - Obsolete Product(s)