ST7LITE0xY0, ST7LITESxY0 8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, timers, SPI Memories 1K or 1.5 Kbytes single voltage Flash Pro- gram memory with read-out protection, In-Cir- cuit and In-Application Programming (ICP and IAP). 10 K write/erase cycles guaranteed, SO16 data retention: 20 years at 55 C. 150 DIP16 128 bytes RAM. 128 bytes data EEPROM with read-out pro- tection. 300K write/erase cycles guaranteed, QFN20 data retention: 20 years at 55 C. Clock, Reset and Supply Management One 12-bit Auto-reload Timer (AT) with output compare function and PWM 3-level low voltage supervisor (LVD) and aux- iliary voltage detector (AVD) for safe power- 1 Communication Interface on/off procedures Clock sources: internal 1MHz RC 1% oscilla- SPI synchronous serial interface tor or external clock A/D Converter PLL x4 or x8 for 4 or 8 MHz internal clock 8-bit resolution for 0 to V DD Four Power Saving Modes: Halt, Active-Halt, Fixed gain Op-amp for 11-bit resolution in 0 to Wait and Slow 250 mV range ( 5V V ) DD Interrupt Management 5 input channels 10 interrupt vectors plus TRAP and RESET Instruction Set 4 external interrupt lines (on 4 vectors) 8-bit data manipulation I/O Ports 63 basic instructions with illegal opcode de- 13 multifunctional bidirectional I/O lines tection 9 alternate function lines 17 main addressing modes 6 high sink outputs 8 x 8 unsigned multiply instruction 2 Timers Development Tools One 8-bit Lite Timer (LT) with prescaler in- Full hardware/software development package cluding: watchdog, 1 realtime base and 1 in- put capture. Device Summary ST7LITESxY0 (ST7SUPERLITE) ST7LITE0xY0 Features ST7LITES2Y0 ST7LITES5Y0 ST7LITE02Y0 ST7LITE05Y0 ST7LITE09Y0 Program memory - bytes 1K 1K 1.5K 1.5K 1.5K RAM (stack) - bytes 128 (64) 128 (64) 128 (64) 128 (64) 128 (64) Data EEPROM - bytes ---- 128 LT Timer w/ Wdg, LT Timer w/ Wdg, LT Timer w/ Wdg, LT Timer w/ Wdg, Peripherals AT Timer w/ 1 PWM, AT Timer w/ 1 PWM, AT Timer w/ 1 PWM, AT Timer w/ 1 PWM, SPI, SPI SPI, 8-bit ADC SPI 8-bit ADC w/ Op-Amp Operating Supply 2.4V to 5.5V CPU Frequency 1MHz RC 1% + PLLx4/8MHz Operating Temperature -40C to +85C Packages SO16 150, DIP16, QFN20 Rev 6 November 2007 1/124 1Table of Contents ST7LITE0xY0, ST7LITESxY0 . 1 1 DESCRIPTION . 5 2 PIN DESCRIPTION 6 3 REGISTER & MEMORY MAP 9 4 FLASH PROGRAM MEMORY 13 4.1 INTRODUCTION . 13 4.2 MAIN FEATURES 13 4.3 PROGRAMMING MODES 13 4.4 ICC INTERFACE . 14 4.5 MEMORY PROTECTION 15 4.6 RELATED DOCUMENTATION 15 4.7 REGISTER DESCRIPTION . 15 5 DATA EEPROM . 16 5.1 INTRODUCTION . 16 5.2 MAIN FEATURES 16 5.3 MEMORY ACCESS . 17 5.4 POWER SAVING MODES . 19 5.5 ACCESS ERROR HANDLING 19 5.6 DATA EEPROM READ-OUT PROTECTION . 19 5.7 REGISTER DESCRIPTION . 20 6 CENTRAL PROCESSING UNIT . 21 6.1 INTRODUCTION . 21 6.2 MAIN FEATURES 21 6.3 CPU REGISTERS 21 7 SUPPLY, RESET AND CLOCK MANAGEMENT 24 7.1 INTERNAL RC OSCILLATOR ADJUSTMENT 24 7.2 PHASE LOCKED LOOP . 24 7.3 REGISTER DESCRIPTION . 25 7.4 RESET SEQUENCE MANAGER (RSM) . 27 8 INTERRUPTS . 29 8.1 NON MASKABLE SOFTWARE INTERRUPT . 29 8.2 EXTERNAL INTERRUPTS . 29 8.3 PERIPHERAL INTERRUPTS . 29 8.4 SYSTEM INTEGRITY MANAGEMENT (SI) 32 9 POWER SAVING MODES . 37 9.1 INTRODUCTION . 37 9.2 SLOW MODE . 37 124 9.3 WAIT MODE 38 9.4 ACTIVE-HALT AND HALT MODES 39 2/124 2