ST7LITE3xF2 8-bit MCU with single voltage Flash, data EEPROM, ADC, timers, SPI, LINSCI Features Memories 8 Kbytes program memory: single voltage ex- tended Flash (XFlash) Program memory with read-out protection, In-Circuit Programming QFN20 and In-Application programming (ICP and IAP), data retention: 20 years at 55C. SO20 384 bytes RAM 256 bytes data EEPROM with read-out pro- DIP20 tection. 300K write/erase cycles guaranteed, data retention: 20 years at 55C. 2 Communication Interfaces Master/slave LINSCI asynchronous serial Clock, Reset and Supply Management interface Enhanced reset system SPI synchronous serial interface Enhanced low voltage supervisor (LVD) for main supply and an auxiliary voltage detector Interrupt Management (AVD) with interrupt capability for implement- 10 interrupt vectors plus TRAP and RESET ing safe power-down procedures 12 external interrupt lines (on 4 vectors) Clock sources: Internal RC 1% oscillator, crystal/ceramic resonator or external clock A/D Converter Optional x4 or x8 PLL for 4 or 8 MHz internal 7 input channels clock 10-bit resolution Five Power Saving Modes: Halt, Active-Halt, Instruction Set Wait and Slow, Auto Wake Up From Halt 8-bit data manipulation I/O Ports 63 basic instructions with illegal opcode Up to 15 multifunctional bidirectional I/O lines detection 7 high sink outputs 17 main addressing modes 5 Timers 8 x 8 unsigned multiply instructions Configurable Watchdog Timer Development Tools Two 8-bit Lite Timers with prescaler, Full hardware/software development package 1 realtime base and 1 input capture DM (Debug module) Two 12-bit Auto-reload Timers with 4 PWM outputs, input capture and output compare functions Table 1. Device summary Features ST7LITE30F2 ST7LITE35F2 ST7LITE39F2 Program memory - bytes 8K RAM (stack) - bytes 384 (128) Data EEPROM - bytes - - 256 Peripherals Lite Timer, Autoreload Timer, SPI, LINSCI, 10-bit ADC Operating Supply 2.7V to 5.5V Up to 8Mhz Up to 8Mhz (w/ ext OSC up to 16MHz CPU Frequency (w/ ext OSC up to 16MHz) and int 1MHz RC 1% PLLx8/4MHz) Operating Temperature -40C to +125C Packages SO20 300, DIP20, QFN20 Rev. 9 November 2007 1/173 1Table of Contents ST7LITE3xF2 1 1 INTRODUCTION 5 2 PIN DESCRIPTION 6 3 REGISTER & MEMORY MAP 9 4 FLASH PROGRAM MEMORY 12 4.1 INTRODUCTION . 12 4.2 MAIN FEATURES 12 4.3 PROGRAMMING MODES 12 4.4 ICC INTERFACE . 13 4.5 MEMORY PROTECTION 14 4.6 RELATED DOCUMENTATION 14 4.7 REGISTER DESCRIPTION . 14 5 DATA EEPROM . 15 5.1 INTRODUCTION . 15 5.2 MAIN FEATURES 15 5.3 MEMORY ACCESS . 16 5.4 POWER SAVING MODES . 18 5.5 ACCESS ERROR HANDLING 18 5.6 DATA EEPROM READ-OUT PROTECTION . 18 5.7 REGISTER DESCRIPTION . 19 6 CENTRAL PROCESSING UNIT . 20 6.1 INTRODUCTION . 20 6.2 MAIN FEATURES 20 6.3 CPU REGISTERS 20 7 SUPPLY, RESET AND CLOCK MANAGEMENT 23 7.1 INTERNAL RC OSCILLATOR ADJUSTMENT 23 7.2 PHASE LOCKED LOOP . 23 7.3 REGISTER DESCRIPTION . 24 7.4 MULTI-OSCILLATOR (MO) . 26 7.5 RESET SEQUENCE MANAGER (RSM) . 27 7.6 SYSTEM INTEGRITY MANAGEMENT (SI) 30 8 INTERRUPTS . 35 8.1 NON MASKABLE SOFTWARE INTERRUPT . 35 8.2 EXTERNAL INTERRUPTS . 35 8.3 PERIPHERAL INTERRUPTS . 35 9 POWER SAVING MODES . 39 9.1 INTRODUCTION . 39 9.2 SLOW MODE . 39 9.3 WAIT MODE 40 9.4 HALT MODE 41 2/173 2